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Date:   Fri, 23 Sep 2022 17:46:25 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     K Prateek Nayak <kprateek.nayak@....com>
Cc:     linux-kernel@...r.kernel.org, rafael@...nel.org, lenb@...nel.org,
        linux-acpi@...r.kernel.org, linux-pm@...r.kernel.org,
        dave.hansen@...ux.intel.com, tglx@...utronix.de, andi@...as.de,
        puwen@...on.cn, mario.limonciello@....com, peterz@...radead.org,
        rui.zhang@...el.com, gpiccoli@...lia.com,
        daniel.lezcano@...aro.org, ananth.narayan@....com,
        gautham.shenoy@....com, Calvin Ong <calvin.ong@....com>,
        "Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
        stable@...r.kernel.org
Subject: Re: [PATCH v2] x86,acpi: Limit "Dummy wait" workaround to older AMD
 and Intel processors

On Fri, Sep 23, 2022 at 09:08:01PM +0530, K Prateek Nayak wrote:
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index ef4775c6db01..fcd3617ed315 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -460,5 +460,6 @@
>  #define X86_BUG_MMIO_UNKNOWN		X86_BUG(26) /* CPU is too old and its MMIO Stale Data status is unknown */
>  #define X86_BUG_RETBLEED		X86_BUG(27) /* CPU is affected by RETBleed */
>  #define X86_BUG_EIBRS_PBRSB		X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */
> +#define X86_BUG_STPCLK			X86_BUG(29) /* STPCLK# signal does not get asserted in time during IOPORT based C-state entry */

What for?

Did you not see this thread?

https://lore.kernel.org/r/78d13a19-2806-c8af-573e-7f2625edfab8@intel.com

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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