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Message-ID: <DM4PR12MB5278639EB4E0FD416653743A9C539@DM4PR12MB5278.namprd12.prod.outlook.com>
Date: Sun, 25 Sep 2022 12:23:04 +0000
From: "Yuan, Perry" <Perry.Yuan@....com>
To: "Fontenot, Nathan" <Nathan.Fontenot@....com>,
"rafael.j.wysocki@...el.com" <rafael.j.wysocki@...el.com>,
"Huang, Ray" <Ray.Huang@....com>,
"viresh.kumar@...aro.org" <viresh.kumar@...aro.org>
CC: "Sharma, Deepak" <Deepak.Sharma@....com>,
"Limonciello, Mario" <Mario.Limonciello@....com>,
"Deucher, Alexander" <Alexander.Deucher@....com>,
"Su, Jinzhou (Joe)" <Jinzhou.Su@....com>,
"Huang, Shimmer" <Shimmer.Huang@....com>,
"Du, Xiaojian" <Xiaojian.Du@....com>,
"Meng, Li (Jassmine)" <Li.Meng@....com>,
"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 4/7] cpufreq: amd_pstate: add AMD pstate EPP support for
shared memory type processor
[AMD Official Use Only - General]
Hi Nathan.
> -----Original Message-----
> From: Fontenot, Nathan <Nathan.Fontenot@....com>
> Sent: Friday, September 16, 2022 12:24 AM
> To: Yuan, Perry <Perry.Yuan@....com>; rafael.j.wysocki@...el.com; Huang,
> Ray <Ray.Huang@....com>; viresh.kumar@...aro.org
> Cc: Sharma, Deepak <Deepak.Sharma@....com>; Limonciello, Mario
> <Mario.Limonciello@....com>; Deucher, Alexander
> <Alexander.Deucher@....com>; Su, Jinzhou (Joe) <Jinzhou.Su@....com>;
> Huang, Shimmer <Shimmer.Huang@....com>; Du, Xiaojian
> <Xiaojian.Du@....com>; Meng, Li (Jassmine) <Li.Meng@....com>; linux-
> pm@...r.kernel.org; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH 4/7] cpufreq: amd_pstate: add AMD pstate EPP support
> for shared memory type processor
>
> On 9/9/22 11:45, Perry Yuan wrote:
> > Add Energy Performance Preference support for AMD SOCs which only
> > support the shared memory interface that implemented on Zen2 and Zen3
> > processors, because this type CPU has no MSR supported, it will use
> > ACPI PCC channel to enable EPP and reset desired perf to be zero.
> >
> > Signed-off-by: Perry Yuan <Perry.Yuan@....com>
> > ---
> > drivers/cpufreq/amd-pstate.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/cpufreq/amd-pstate.c
> > b/drivers/cpufreq/amd-pstate.c index 451295284a26..fff298744a8e 100644
> > --- a/drivers/cpufreq/amd-pstate.c
> > +++ b/drivers/cpufreq/amd-pstate.c
> > @@ -133,12 +133,24 @@ static inline int pstate_enable(bool enable)
> >
> > static int cppc_enable(bool enable)
> > {
> > + struct cppc_perf_ctrls perf_ctrls;
> > int cpu, ret = 0;
> >
> > for_each_present_cpu(cpu) {
> > ret = cppc_set_enable(cpu, enable);
> > if (ret)
> > return ret;
> > +
> > + /* Enable active mode for EPP */
> > + ret = cppc_set_auto_epp(cpu, enable);
> > + if (ret)
> > + return ret;
> > +
> > + /* Set zero to desired perf to enable EPP control*/
> > + perf_ctrls.desired_perf = 0;
> > + ret = cppc_set_perf(cpu, &perf_ctrls);
> > + if (ret)
> > + return ret;
>
> Shouldn't this entire block be indented one additional tab over since its part
> of the for_each_present_cpu() loop?
>
> -Nathan
Yes, I can see the indent in my local vscode editor, I do not know why the patch didn`t show that.
Is it correct as below ?
for_each_present_cpu(cpu) {
ret = cppc_set_enable(cpu, enable);
if (ret)
return ret;
if (epp_enabled) {
/* Enable autonomous mode for EPP */
ret = cppc_set_auto_epp(cpu, enable);
if (ret)
return ret;
/* Set zero to desired perf to allow EPP firmware control*/
perf_ctrls.desired_perf = 0;
ret = cppc_set_perf(cpu, &perf_ctrls);
if (ret)
return ret;
}
}
Perry.
>
> > }
> >
> > return ret;
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