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Message-ID: <AS8PR04MB8676F3FF81487FF00B3C85638C529@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date:   Mon, 26 Sep 2022 05:17:56 +0000
From:   Hongxing Zhu <hongxing.zhu@....com>
To:     Bjorn Helgaas <helgaas@...nel.org>
CC:     "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "kishon@...com" <kishon@...com>, "kw@...ux.com" <kw@...ux.com>,
        Frank Li <frank.li@....com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v3 0/14] Add iMX PCIe EP mode support

> -----Original Message-----
> From: Bjorn Helgaas <helgaas@...nel.org>
> Sent: 2022年9月23日 21:54
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: l.stach@...gutronix.de; bhelgaas@...gle.com; robh+dt@...nel.org;
> lorenzo.pieralisi@....com; shawnguo@...nel.org; kishon@...com;
> kw@...ux.com; Frank Li <frank.li@....com>; linux-pci@...r.kernel.org;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-kernel@...r.kernel.org; kernel@...gutronix.de; dl-linux-imx
> <linux-imx@....com>
> Subject: Re: [PATCH v3 0/14] Add iMX PCIe EP mode support
> 
> On Fri, Sep 23, 2022 at 02:06:46PM +0800, Richard Zhu wrote:
> > i.MX PCIe controller is one dual mode PCIe controller, and can work
> > either as RC or EP.
> > This series add the i.MX PCIe EP mode support. And had been verified
> > on i.MX8MQ EVK, i.MX8MM EVK and i.MX8MP EVK boards.
> > In the verification, one EVK board used as RC, the other one used as EP.
> > Use the cross TX/RX differential cable connect the two PCIe ports of
> > these two EVK boards.
> >
> > +-----------+                +------------+
> > |   PCIe TX |<-------------->|PCIe RX     |
> > |           |                |            |
> > |EVK Board  |                |EVK Board   |
> > |           |                |            |
> > |   PCIe RX |<-------------->|PCIe TX     |
> > +-----------+                +------------+
> >
> > Main changes from v2 -> v3:
> > - Add the i.MX8MP PCIe EP support, and verified on i.MX8MP EVK board.
> > - Rebase to latest pci/next branch(tag: v6.0-rc1 plus some PCIe changes).
> 
> This doesn't apply cleanly on either v6.0-rc1 or my "next" branch.
> It's best to base your branch on my "main" branch (currently v6.0-rc1) because
> that's an unambiguous base that remains stable for the entire cycle.
> 
> If your series actually *depends* on something that's already been merged,
> specify that and include the SHA1 (not just something vague like "latest
> pci/next" or "v6.0-rc1 plus some PCIe changes") so we can figure out how to
> handle it.
Thanks for your review.
Yes, some i.MX8MP PCIe support patches are required, since the i.MX8MP
PCIe EP is new added in the v3 series.
Would post them later.

Best Regards
Richard Zhu

> 
> Bjorn

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