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Message-ID: <CAMdYzYoR2caD2ecN5vGTiHejoE5AhbyKxSgSeU1+SzU7nNVTwg@mail.gmail.com>
Date: Mon, 26 Sep 2022 14:58:03 -0400
From: Peter Geis <pgwipeout@...il.com>
To: Aurelien Jarno <aurelien@...el32.net>
Cc: linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Frank Wunderlich <frank-w@...lic-files.de>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/Rockchip SoC support"
<linux-arm-kernel@...ts.infradead.org>,
"open list:ARM/Rockchip SoC support"
<linux-rockchip@...ts.infradead.org>
Subject: Re: [PATCH] arm64: dts: rockchip: Add missing rockchip,pipe-grf to
rk3568 PCIe v3 PHY
On Mon, Sep 26, 2022 at 2:35 PM Aurelien Jarno <aurelien@...el32.net> wrote:
>
> This commit fixes the error message
>
> rockchip-snps-pcie3-phy fe8c0000.phy: failed to find rockchip,pipe_grf regmap
The pipe grf only is used on the rk3588 device for this phy.
>
> during boot by providing the missing rockchip,pipe-grf property.
>
> Fixes: faedfa5b40f0 ("arm64: dts: rockchip: Add PCIe v3 nodes to rk3568")
> Signed-off-by: Aurelien Jarno <aurelien@...el32.net>
> ---
> arch/arm64/boot/dts/rockchip/rk3568.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> index ba67b58f05b7..8818b283ba11 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> @@ -56,6 +56,7 @@ pcie30phy: phy@...c0000 {
> clock-names = "refclk_m", "refclk_n", "pclk";
> resets = <&cru SRST_PCIE30PHY>;
> reset-names = "phy";
> + rockchip,pipe-grf = <&pipegrf>;
> rockchip,phy-grf = <&pcie30_phy_grf>;
> status = "disabled";
> };
> --
> 2.35.1
>
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