[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220926074415.53100-31-krzysztof.kozlowski@linaro.org>
Date: Mon, 26 Sep 2022 09:44:12 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephan Gerhold <stephan@...hold.net>,
Shawn Guo <shawn.guo@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
krishna Lanka <quic_vamslank@...cinc.com>,
Sivaprakash Murugesan <sivaprak@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v2 30/33] dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
.../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
index cdfcf29dffee..0f796f1f0104 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
@@ -49,8 +49,10 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sdx65-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sdx65-tlmm-state"
+ additionalProperties: false
+
'$defs':
qcom-sdx65-tlmm-state:
type: object
@@ -175,13 +177,13 @@ examples:
};
uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "blsp_uart1";
bias-pull-up;
};
- tx {
+ tx-pins {
pins = "gpio5";
function = "blsp_uart1";
bias-disable;
--
2.34.1
Powered by blists - more mailing lists