linux-kernel - Re: [PATCH v2 08/10] clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents

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Message-ID: <CAGXv+5Efk=EDUp=TBLe-5vQSSsv_YvG2cSmK0pRwLO58tah1PQ@mail.gmail.com>
Date:   Mon, 26 Sep 2022 11:21:29 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     matthias.bgg@...il.com, mturquette@...libre.com, sboyd@...nel.org,
        miles.chen@...iatek.com, rex-bc.chen@...iatek.com,
        nfraprado@...labora.com, chun-jie.chen@...iatek.com,
        jose.exposito89@...il.com, drinkcat@...omium.org,
        weiyi.lu@...iatek.com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org
Subject: Re: [PATCH v2 08/10] clk: mediatek: clk-mt8195-topckgen: Drop
 univplls from mfg mux parents

On Thu, Sep 15, 2022 at 3:25 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
>
> These PLLs are conflicting with GPU rates that can be generated by
> the GPU-dedicated MFGPLL and would require a special clock handler
> to be used, for very little and ignorable power consumption benefits.
> Also, we're in any case unable to set the rate of these PLLs to
> something else that is sensible for this task, so simply drop them:
> this will make the GPU to be clocked exclusively from MFGPLL for
> "fast" rates, while still achieving the right "safe" rate during
> PLL frequency locking.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>