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Date:   Tue, 27 Sep 2022 17:20:05 +0200
From:   Robert Marko <robimarko@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Stephan Gerhold <stephan@...hold.net>,
        Shawn Guo <shawn.guo@...aro.org>,
        Vinod Koul <vkoul@...nel.org>,
        krishna Lanka <quic_vamslank@...cinc.com>,
        Sivaprakash Murugesan <sivaprak@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 01/33] arm64: dts: qcom: ipq6018-cp01-c1: correct
 blspi1 pins


On 27. 09. 2022. 16:33, Krzysztof Kozlowski wrote:
> On 27/09/2022 16:01, Robert Marko wrote:
>> On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote:
>>> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
>>> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
>>> the device node lacked respective pin configuration assignment.   It
>>> used also blsp0_spi function but that was probably the same mistake as
>>> naming it SPI0.
>> Hi,
>>
>> Sorry for making it confusing, but "blsp0_spi" is the correct function.
>> Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT
>> we call the nodes blsp1-blsp6.
>>
>> It would probably be better for me to rename the nodes to blsp0-5 instead.
> OK, so instead I will add blsp0_spi to the bindings.

Can you add blsp0_uart and blsp0_i2c as well?
All 6 of the QUP-s have same features.

I am adding MDIO to CP01, so I can add mdc and mdio to bindings
as they are lacking there as well.

Regards,
Robert

>
> Best regards,
> Krzysztof
>

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