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Date: Mon, 26 Sep 2022 22:23:03 -0500 From: Bjorn Andersson <andersson@...nel.org> To: quic_krichai@...cinc.com, helgaas@...nel.org Cc: quic_vbadigan@...cinc.com, vkoul@...nel.org, Manivannan Sadhasivam <mani@...nel.org>, linux-kernel@...r.kernel.org, quic_ramkri@...cinc.com, konrad.dybcio@...ainline.org, bhelgaas@...gle.com, dmitry.baryshkov@...aro.org, linux-arm-msm@...r.kernel.org, swboyd@...omium.org, quic_nitegupt@...cinc.com, svarbanov@...sol.com, lpieralisi@...nel.org, kishon@...com, quic_skananth@...cinc.com, mturquette@...libre.com, robh@...nel.org, mka@...omium.org, linux-phy@...ts.infradead.org, agross@...nel.org, quic_hemantk@...cinc.com, kw@...ux.com, linux-pci@...r.kernel.org, linux-clk@...r.kernel.org Subject: Re: (subset) [PATCH v7 0/5] PCI: qcom: Add system suspend & resume support On Tue, 20 Sep 2022 15:52:22 +0530, Krishna chaitanya chundru wrote: > Few PCIe endpoints like NVMe and WLANs are always expecting the device > to be in D0 state and the link to be active (or in l1ss) all the > time (including in S3 state). > > This patch series adds this support for allowing the system to enter > S3 state (and further low power states) with PCIe Device being in D0 > state and with link being in l1ss on qcom platforms. > > [...] Applied, thanks! [5/5] clk: qcom: gcc-sc7280: Update the .pwrsts for PCIe GDSC commit: 1a58ee1330b2cb6d71feb0aaf827cc10030f78b4 Best regards, -- Bjorn Andersson <andersson@...nel.org>
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