linux-kernel - Re: [PATCH 04/13] phy: qcom-qmp-pcie: unify ipq registers

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Message-ID: <CD3050AE-693F-4AD7-9F1E-016E2AB1DF99@linaro.org>
Date:   Wed, 28 Sep 2022 20:34:37 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Johan Hovold <johan+linaro@...nel.org>,
        Vinod Koul <vkoul@...nel.org>
CC:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 04/13] phy: qcom-qmp-pcie: unify ipq registers



On 28 September 2022 18:28:13 GMT+03:00, Johan Hovold <johan+linaro@...nel.org> wrote:
>The IPQ register array is identical to sm8250_pcie_regs_layout so drop
>the former.

I'd not do such merge. They belong to different generations. I'd suggest changing these arrays to use symbolic names defined in corresponding qmp headers.

>
>Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
>---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 11 ++---------
> 1 file changed, 2 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
>index ec453f908f1d..7b3f7e42edd5 100644
>--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
>+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
>@@ -86,13 +86,6 @@ enum qphy_reg_layout {
> 	QPHY_LAYOUT_SIZE
> };
> 
>-static const unsigned int ipq_pciephy_gen3_regs_layout[QPHY_LAYOUT_SIZE] = {
>-	[QPHY_SW_RESET]				= 0x00,
>-	[QPHY_START_CTRL]			= 0x44,
>-	[QPHY_PCS_STATUS]			= 0x14,
>-	[QPHY_PCS_POWER_DOWN_CONTROL]		= 0x40,
>-};
>-
> static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = {
> 	[QPHY_SW_RESET]			= 0x00,
> 	[QPHY_START_CTRL]		= 0x08,
>@@ -1492,7 +1485,7 @@ static const struct qmp_phy_cfg ipq8074_pciephy_gen3_cfg = {
> 	.num_resets		= ARRAY_SIZE(ipq8074_pciephy_reset_l),
> 	.vreg_list		= NULL,
> 	.num_vregs		= 0,
>-	.regs			= ipq_pciephy_gen3_regs_layout,
>+	.regs			= sm8250_pcie_regs_layout,
> 
> 	.start_ctrl		= SERDES_START | PCS_START,
> 	.pwrdn_ctrl		= SW_PWRDN | REFCLK_DRV_DSBL,
>@@ -1523,7 +1516,7 @@ static const struct qmp_phy_cfg ipq6018_pciephy_cfg = {
> 	.num_resets		= ARRAY_SIZE(ipq8074_pciephy_reset_l),
> 	.vreg_list		= NULL,
> 	.num_vregs		= 0,
>-	.regs			= ipq_pciephy_gen3_regs_layout,
>+	.regs			= sm8250_pcie_regs_layout,
> 
> 	.start_ctrl		= SERDES_START | PCS_START,
> 	.pwrdn_ctrl		= SW_PWRDN | REFCLK_DRV_DSBL,

-- 
With best wishes
Dmitry