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Message-ID: <20220928002312.GA2701950-robh@kernel.org>
Date: Tue, 27 Sep 2022 19:23:12 -0500
From: Rob Herring <robh@...nel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Konrad Dybcio <konrad.dybcio@...ainline.org>,
linux-arm-msm@...r.kernel.org, Shawn Guo <shawn.guo@...aro.org>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
Andy Gross <agross@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
Sivaprakash Murugesan <sivaprak@...eaurora.org>,
Linus Walleij <linus.walleij@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephan Gerhold <stephan@...hold.net>,
krishna Lanka <quic_vamslank@...cinc.com>
Subject: Re: [PATCH v3 31/34] dt-bindings: pinctrl: qcom,sdx65: fix matching
pin config
On Tue, 27 Sep 2022 19:36:59 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Reviewed-by: Bjorn Andersson <andersson@...nel.org>
> ---
> .../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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