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Message-ID: <20220928002238.GA2698415-robh@kernel.org>
Date:   Tue, 27 Sep 2022 19:22:38 -0500
From:   Rob Herring <robh@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Stephan Gerhold <stephan@...hold.net>,
        linux-kernel@...r.kernel.org, Andy Gross <agross@...nel.org>,
        devicetree@...r.kernel.org, Bjorn Andersson <andersson@...nel.org>,
        Sivaprakash Murugesan <sivaprak@...eaurora.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        krishna Lanka <quic_vamslank@...cinc.com>,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        Vinod Koul <vkoul@...nel.org>, Shawn Guo <shawn.guo@...aro.org>
Subject: Re: [PATCH v3 28/34] dt-bindings: pinctrl: qcom,sdx55: fix matching
 pin config

On Tue, 27 Sep 2022 19:36:56 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
> (level one and two) are not properly matched.
> 
>   qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@...0000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
> 
> This method also unifies the bindings with other Qualcomm TLMM and LPASS
> pinctrl bindings.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Reviewed-by: Bjorn Andersson <andersson@...nel.org>
> ---
>  .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml       | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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