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Message-Id: <20220928-mdm9615-dt-schema-fixes-v1-7-b6e63a7df1e8@linaro.org>
Date: Wed, 28 Sep 2022 09:14:57 +0000
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Andy Gross <agross@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>
Cc: devicetree@...r.kernel.org,
Neil Armstrong <neil.armstrong@...aro.org>,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: [PATCH v1 7/7] arm: dts: qcom: mdm9615: remove useless amba subnode
Since amba node type has been deprecated, remove this subnode and
move the mmc nodes in the main soc node.
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index d8723bd3fedb..1db822db7702 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -314,49 +314,43 @@ sdcc2bam: dma-controller@...42000{
qcom,ee = <0>;
};
- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- sdcc1: mmc@...80000 {
- status = "disabled";
- compatible = "arm,pl18x", "arm,primecell";
- arm,primecell-periphid = <0x00051180>;
- reg = <0x12180000 0x2000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
- clock-names = "mclk", "apb_pclk";
- bus-width = <8>;
- max-frequency = <48000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- vmmc-supply = <&vsdcc_fixed>;
- dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
- dma-names = "tx", "rx";
- assigned-clocks = <&gcc SDC1_CLK>;
- assigned-clock-rates = <400000>;
- };
+ sdcc1: mmc@...80000 {
+ status = "disabled";
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ reg = <0x12180000 0x2000>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <8>;
+ max-frequency = <48000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ vmmc-supply = <&vsdcc_fixed>;
+ dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
+ dma-names = "tx", "rx";
+ assigned-clocks = <&gcc SDC1_CLK>;
+ assigned-clock-rates = <400000>;
+ };
- sdcc2: mmc@...40000 {
- compatible = "arm,pl18x", "arm,primecell";
- arm,primecell-periphid = <0x00051180>;
- status = "disabled";
- reg = <0x12140000 0x2000>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
- clock-names = "mclk", "apb_pclk";
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <48000000>;
- no-1-8-v;
- vmmc-supply = <&vsdcc_fixed>;
- dmas = <&sdcc2bam 2>, <&sdcc2bam 1>;
- dma-names = "tx", "rx";
- assigned-clocks = <&gcc SDC2_CLK>;
- assigned-clock-rates = <400000>;
- };
+ sdcc2: mmc@...40000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ status = "disabled";
+ reg = <0x12140000 0x2000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <48000000>;
+ no-1-8-v;
+ vmmc-supply = <&vsdcc_fixed>;
+ dmas = <&sdcc2bam 2>, <&sdcc2bam 1>;
+ dma-names = "tx", "rx";
+ assigned-clocks = <&gcc SDC2_CLK>;
+ assigned-clock-rates = <400000>;
};
tcsr: syscon@...00000 {
--
b4 0.10.0
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