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Message-ID: <f57feedb-01ce-4c15-1344-860bff602b10@linaro.org>
Date:   Thu, 29 Sep 2022 22:05:20 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Johan Hovold <johan+linaro@...nel.org>,
        Vinod Koul <vkoul@...nel.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 05/11] phy: qcom-qmp-pcie: move power-down update

On 29/09/2022 12:29, Johan Hovold wrote:
> Move the power-down-control register update that powers on the PHY to
> the power-on handler so that it matches the power-off handler.
> 
> Note that the power-on handler is currently always called directly
> after init.
> 
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

> ---
>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 7 +++----
>   1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> index efffb77e8f45..db78d2d76c03 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> @@ -1862,7 +1862,6 @@ static int qmp_pcie_init(struct phy *phy)
>   	struct qmp_phy *qphy = phy_get_drvdata(phy);
>   	struct qcom_qmp *qmp = qphy->qmp;
>   	const struct qmp_phy_cfg *cfg = qphy->cfg;
> -	void __iomem *pcs = qphy->pcs;
>   	int ret;
>   
>   	/* turn on regulator supplies */
> @@ -1888,9 +1887,6 @@ static int qmp_pcie_init(struct phy *phy)
>   	if (ret)
>   		goto err_assert_reset;
>   
> -	qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> -			cfg->pwrdn_ctrl);
> -
>   	return 0;
>   
>   err_assert_reset:
> @@ -1929,6 +1925,9 @@ static int qmp_pcie_power_on(struct phy *phy)
>   	unsigned int mask, val, ready;
>   	int ret;
>   
> +	qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> +			cfg->pwrdn_ctrl);
> +
>   	qmp_pcie_serdes_init(qphy);
>   
>   	ret = clk_prepare_enable(qphy->pipe_clk);

-- 
With best wishes
Dmitry

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