linux-kernel - Re: [PATCH v1 05/22] perf vendor events: Update Intel alderlake

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Message-ID: <YzWXBGyjs39cD7Cd@kernel.org>
Date:   Thu, 29 Sep 2022 10:00:52 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Ian Rogers <irogers@...gle.com>
Cc:     Xing Zhengjun <zhengjun.xing@...ux.intel.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Andi Kleen <ak@...ux.intel.com>, perry.taylor@...el.com,
        caleb.biggers@...el.com, kshipra.bopardikar@...el.com,
        samantha.alt@...el.com, ahmad.yasin@...el.com,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        John Garry <john.garry@...wei.com>,
        James Clark <james.clark@....com>,
        Kajol Jain <kjain@...ux.ibm.com>,
        Thomas Richter <tmricht@...ux.ibm.com>,
        Miaoqian Lin <linmq006@...il.com>,
        Florian Fischer <florian.fischer@...q.space>,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        Stephane Eranian <eranian@...gle.com>
Subject: Re: [PATCH v1 05/22] perf vendor events: Update Intel alderlake

Em Wed, Sep 28, 2022 at 07:23:37PM -0700, Ian Rogers escreveu:
> On Wed, Sep 28, 2022 at 7:08 AM Arnaldo Carvalho de Melo
> <acme@...nel.org> wrote:
> >
> > Em Wed, Sep 28, 2022 at 04:22:53PM +0800, Xing Zhengjun escreveu:
> > > On 9/28/2022 3:21 PM, Ian Rogers wrote:
> > > > diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
> > > > index 7f2d777fd97f..594c6e96f0ce 100644
> > > > --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
> > > > +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
> > > > @@ -1,5 +1,5 @@
> > > >   Family-model,Version,Filename,EventType
> > > > -GenuineIntel-6-9[7A],v1.13,alderlake,core
> > > > +GenuineIntel-6-(97|9A|B7|BA|BF),v1.15,alderlake,core
> > >
> > > The commit description should mention this change "Add more CPUID support
> > > for ADL"
> >
> > I added this note, with that can I have your Reviewed-by or Acked-by?
> >
> > - Arnaldo
> 
> I think I should send a v2. I can add this then. Other things for v2 are:

Ok, I'll drop v1 from my local, testing branch.

> - this week there will likely be an update to [1] which is implicitly
> integrated here.
> - the topdown metrics are all percentages but are currently values
> zero to 1. It is straightforward to add a ScaleUnit of 100% to them
> all.
> - eyeballing topdown event metrics like:
> 
>     {
>        "BriefDescription": "This category represents fraction of slots
> utilized by useful work i.e. issued uops that eventually get retired",
>        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound +
> topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",
>        "MetricGroup": "TopdownL1;tma_L1_group",
>        "MetricName": "tma_retiring",
> ...
> it looks like the group will fail due to the missing slots event. This
> can be fixed with:
>        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound +
> topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0
> * TOPDOWN.SLOTS",
> 
> Thanks,
> Ian
> 
> [1] https://github.com/intel/perfmon-metrics
> 
> > > >   GenuineIntel-6-(1C|26|27|35|36),v4,bonnell,core
> > > >   GenuineIntel-6-(3D|47),v26,broadwell,core
> > > >   GenuineIntel-6-56,v23,broadwellde,core
> > >
> > > --
> > > Zhengjun Xing
> >
> > --
> >
> > - Arnaldo

-- 

- Arnaldo