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Message-ID: <20220929224648.8997-4-Sergey.Semin@baikalelectronics.ru>
Date: Fri, 30 Sep 2022 01:46:48 +0300
From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
To: Jens Axboe <axboe@...nel.dk>, Keith Busch <kbusch@...nel.org>,
Jens Axboe <axboe@...com>, Christoph Hellwig <hch@....de>,
Sagi Grimberg <sagi@...mberg.me>,
Jonathan Derrick <jonathan.derrick@...el.com>,
Revanth Rajashekar <revanth.rajashekar@...el.com>,
Rafael Antognolli <Rafael.Antognolli@...el.com>,
Scott Bauer <scott.bauer@...el.com>
CC: Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
<linux-nvme@...ts.infradead.org>, <linux-block@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v2 3/3] block: sed-opal: Cache-line-align the cmd/resp buffers
In accordance with [1] the DMA-able memory buffers must be
cacheline-aligned otherwise the cache writing-back and invalidation
performed during the mapping may cause the adjacent data being lost. It's
specifically required for the DMA-noncoherent platforms. Seeing the
opal_dev.{cmd,resp} buffers are used for DMAs in the NVME and SCSI/SD
drivers in framework of the nvme_sec_submit() and sd_sec_submit() methods
respectively we must make sure the passed buffers are cacheline-aligned to
prevent the denoted problem.
[1] Documentation/core-api/dma-api.rst
Fixes: 455a7b238cd6 ("block: Add Sed-opal library")
Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
---
block/sed-opal.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/block/sed-opal.c b/block/sed-opal.c
index 9700197000f2..222acbd1f03a 100644
--- a/block/sed-opal.c
+++ b/block/sed-opal.c
@@ -73,6 +73,7 @@ struct parsed_resp {
struct opal_resp_tok toks[MAX_TOKS];
};
+/* Presumably DMA-able buffers must be cache-aligned */
struct opal_dev {
bool supported;
bool mbr_enabled;
@@ -88,8 +89,8 @@ struct opal_dev {
u64 lowest_lba;
size_t pos;
- u8 cmd[IO_BUFFER_LENGTH];
- u8 resp[IO_BUFFER_LENGTH];
+ u8 cmd[IO_BUFFER_LENGTH] ____cacheline_aligned;
+ u8 resp[IO_BUFFER_LENGTH] ____cacheline_aligned;
struct parsed_resp parsed;
size_t prev_d_len;
--
2.37.3
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