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Message-ID: <20220929225402.9696-7-Sergey.Semin@baikalelectronics.ru>
Date: Fri, 30 Sep 2022 01:54:00 +0300
From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
To: Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
<linux-clk@...r.kernel.org>, <linux-mips@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Rob Herring <robh@...nel.org>,
<devicetree@...r.kernel.org>
Subject: [PATCH RESEND v12 6/8] dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
Aside with a set of the trigger-like resets Baikal-T1 CCU provides
additional directly controlled reset signals for the DDR and PCIe
controllers. As a preparation before adding these resets support to the
kernel let's extent the Baikal-T1 CCU IDs list with the new IDs, which
will be used to access the corresponding reset controls.
Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
Acked-by: Rob Herring <robh@...nel.org>
---
Changelog v11:
- This is a new patch created by detaching the DT-part from:
[PATCH v10 6/7] clk: baikal-t1: Add DDR/PCIe directly controlled resets support
(@Krzysztof)
---
include/dt-bindings/reset/bt1-ccu.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/dt-bindings/reset/bt1-ccu.h b/include/dt-bindings/reset/bt1-ccu.h
index 3578e83026bc..c691efaa678f 100644
--- a/include/dt-bindings/reset/bt1-ccu.h
+++ b/include/dt-bindings/reset/bt1-ccu.h
@@ -21,5 +21,14 @@
#define CCU_SYS_SATA_REF_RST 0
#define CCU_SYS_APB_RST 1
+#define CCU_SYS_DDR_FULL_RST 2
+#define CCU_SYS_DDR_INIT_RST 3
+#define CCU_SYS_PCIE_PCS_PHY_RST 4
+#define CCU_SYS_PCIE_PIPE0_RST 5
+#define CCU_SYS_PCIE_CORE_RST 6
+#define CCU_SYS_PCIE_PWR_RST 7
+#define CCU_SYS_PCIE_STICKY_RST 8
+#define CCU_SYS_PCIE_NSTICKY_RST 9
+#define CCU_SYS_PCIE_HOT_RST 10
#endif /* __DT_BINDINGS_RESET_BT1_CCU_H */
--
2.37.3
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