lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-ID: <202209290254.kVPcoGXz-lkp@intel.com>
Date:   Thu, 29 Sep 2022 02:21:31 +0800
From:   kernel test robot <lkp@...el.com>
To:     Matthias Brugger <matthias.bgg@...il.com>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org
Subject: [mbgg-mediatek:v6.0-dev/svs-dev 20/23]
 drivers/soc/mediatek/mtk-svs-mt8183.c:5:6: warning: no previous prototype
 for 'svs_mt8183_efuse_parsing'

tree:   https://github.com/mbgg/linux-mediatek v6.0-dev/svs-dev
head:   57d049e09b7ab46649f708395243291c5ab31c11
commit: f0eb90638d1d33cca260564a9daf6c7dca5318b1 [20/23] soc: mediatek: mtk-svs: Move SoC specific functions to new files
config: m68k-allyesconfig
compiler: m68k-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/mbgg/linux-mediatek/commit/f0eb90638d1d33cca260564a9daf6c7dca5318b1
        git remote add mbgg-mediatek https://github.com/mbgg/linux-mediatek
        git fetch --no-tags mbgg-mediatek v6.0-dev/svs-dev
        git checkout f0eb90638d1d33cca260564a9daf6c7dca5318b1
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash drivers/soc/mediatek/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

>> drivers/soc/mediatek/mtk-svs-mt8183.c:5:6: warning: no previous prototype for 'svs_mt8183_efuse_parsing' [-Wmissing-prototypes]
       5 | bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/soc/mediatek/mtk-svs-mt8183.c:197:5: warning: no previous prototype for 'svs_mt8183_platform_probe' [-Wmissing-prototypes]
     197 | int svs_mt8183_platform_probe(struct svs_platform *svsp)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~
--
>> drivers/soc/mediatek/mtk-svs-mt8192.c:5:6: warning: no previous prototype for 'svs_mt8192_efuse_parsing' [-Wmissing-prototypes]
       5 | bool svs_mt8192_efuse_parsing(struct svs_platform *svsp)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/soc/mediatek/mtk-svs-mt8192.c:69:5: warning: no previous prototype for 'svs_mt8192_platform_probe' [-Wmissing-prototypes]
      69 | int svs_mt8192_platform_probe(struct svs_platform *svsp)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~


vim +/svs_mt8183_efuse_parsing +5 drivers/soc/mediatek/mtk-svs-mt8183.c

     4	
   > 5	bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
     6	{
     7		struct svs_bank *svsb;
     8		int format[6], x_roomt[6], o_vtsmcu[5], o_vtsabb, tb_roomt = 0;
     9		int adc_ge_t, adc_oe_t, ge, oe, gain, degc_cali, adc_cali_en_t;
    10		int o_slope, o_slope_sign, ts_id;
    11		u32 idx, i, ft_pgm, mts, temp0, temp1, temp2;
    12		int ret;
    13	
    14		for (i = 0; i < svsp->efuse_max; i++)
    15			if (svsp->efuse[i])
    16				dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n",
    17					 i, svsp->efuse[i]);
    18	
    19		if (!svsp->efuse[2]) {
    20			dev_notice(svsp->dev, "svs_efuse[2] = 0x0?\n");
    21			return false;
    22		}
    23	
    24		/* Svs efuse parsing */
    25		ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);
    26	
    27		for (idx = 0; idx < svsp->bank_max; idx++) {
    28			svsb = &svsp->banks[idx];
    29	
    30			if (ft_pgm <= 1)
    31				svsb->volt_flags |= SVSB_INIT01_VOLT_IGNORE;
    32	
    33			switch (svsb->sw_id) {
    34			case SVSB_CPU_LITTLE:
    35				svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
    36				svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
    37				svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
    38				svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
    39				svsb->mtdes  = (svsp->efuse[17] >> 16) & GENMASK(7, 0);
    40	
    41				if (ft_pgm <= 3)
    42					svsb->volt_od += 10;
    43				else
    44					svsb->volt_od += 2;
    45				break;
    46			case SVSB_CPU_BIG:
    47				svsb->bdes = svsp->efuse[18] & GENMASK(7, 0);
    48				svsb->mdes = (svsp->efuse[18] >> 8) & GENMASK(7, 0);
    49				svsb->dcbdet = (svsp->efuse[18] >> 16) & GENMASK(7, 0);
    50				svsb->dcmdet = (svsp->efuse[18] >> 24) & GENMASK(7, 0);
    51				svsb->mtdes  = svsp->efuse[17] & GENMASK(7, 0);
    52	
    53				if (ft_pgm <= 3)
    54					svsb->volt_od += 15;
    55				else
    56					svsb->volt_od += 12;
    57				break;
    58			case SVSB_CCI:
    59				svsb->bdes = svsp->efuse[4] & GENMASK(7, 0);
    60				svsb->mdes = (svsp->efuse[4] >> 8) & GENMASK(7, 0);
    61				svsb->dcbdet = (svsp->efuse[4] >> 16) & GENMASK(7, 0);
    62				svsb->dcmdet = (svsp->efuse[4] >> 24) & GENMASK(7, 0);
    63				svsb->mtdes  = (svsp->efuse[5] >> 16) & GENMASK(7, 0);
    64	
    65				if (ft_pgm <= 3)
    66					svsb->volt_od += 10;
    67				else
    68					svsb->volt_od += 2;
    69				break;
    70			case SVSB_GPU:
    71				svsb->bdes = svsp->efuse[6] & GENMASK(7, 0);
    72				svsb->mdes = (svsp->efuse[6] >> 8) & GENMASK(7, 0);
    73				svsb->dcbdet = (svsp->efuse[6] >> 16) & GENMASK(7, 0);
    74				svsb->dcmdet = (svsp->efuse[6] >> 24) & GENMASK(7, 0);
    75				svsb->mtdes  = svsp->efuse[5] & GENMASK(7, 0);
    76	
    77				if (ft_pgm >= 2) {
    78					svsb->freq_base = 800000000; /* 800MHz */
    79					svsb->dvt_fixed = 2;
    80				}
    81				break;
    82			default:
    83				dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id);
    84				return false;
    85			}
    86		}
    87	
    88		ret = svs_thermal_efuse_get_data(svsp);
    89		if (ret)
    90			return false;
    91	
    92		/* Thermal efuse parsing */
    93		adc_ge_t = (svsp->tefuse[1] >> 22) & GENMASK(9, 0);
    94		adc_oe_t = (svsp->tefuse[1] >> 12) & GENMASK(9, 0);
    95	
    96		o_vtsmcu[0] = (svsp->tefuse[0] >> 17) & GENMASK(8, 0);
    97		o_vtsmcu[1] = (svsp->tefuse[0] >> 8) & GENMASK(8, 0);
    98		o_vtsmcu[2] = svsp->tefuse[1] & GENMASK(8, 0);
    99		o_vtsmcu[3] = (svsp->tefuse[2] >> 23) & GENMASK(8, 0);
   100		o_vtsmcu[4] = (svsp->tefuse[2] >> 5) & GENMASK(8, 0);
   101		o_vtsabb = (svsp->tefuse[2] >> 14) & GENMASK(8, 0);
   102	
   103		degc_cali = (svsp->tefuse[0] >> 1) & GENMASK(5, 0);
   104		adc_cali_en_t = svsp->tefuse[0] & BIT(0);
   105		o_slope_sign = (svsp->tefuse[0] >> 7) & BIT(0);
   106	
   107		ts_id = (svsp->tefuse[1] >> 9) & BIT(0);
   108		o_slope = (svsp->tefuse[0] >> 26) & GENMASK(5, 0);
   109	
   110		if (adc_cali_en_t == 1) {
   111			if (!ts_id)
   112				o_slope = 0;
   113	
   114			if (adc_ge_t < 265 || adc_ge_t > 758 ||
   115			    adc_oe_t < 265 || adc_oe_t > 758 ||
   116			    o_vtsmcu[0] < -8 || o_vtsmcu[0] > 484 ||
   117			    o_vtsmcu[1] < -8 || o_vtsmcu[1] > 484 ||
   118			    o_vtsmcu[2] < -8 || o_vtsmcu[2] > 484 ||
   119			    o_vtsmcu[3] < -8 || o_vtsmcu[3] > 484 ||
   120			    o_vtsmcu[4] < -8 || o_vtsmcu[4] > 484 ||
   121			    o_vtsabb < -8 || o_vtsabb > 484 ||
   122			    degc_cali < 1 || degc_cali > 63) {
   123				dev_err(svsp->dev, "bad thermal efuse, no mon mode\n");
   124				goto remove_mt8183_svsb_mon_mode;
   125			}
   126		} else {
   127			dev_err(svsp->dev, "no thermal efuse, no mon mode\n");
   128			goto remove_mt8183_svsb_mon_mode;
   129		}
   130	
   131		ge = ((adc_ge_t - 512) * 10000) / 4096;
   132		oe = (adc_oe_t - 512);
   133		gain = (10000 + ge);
   134	
   135		format[0] = (o_vtsmcu[0] + 3350 - oe);
   136		format[1] = (o_vtsmcu[1] + 3350 - oe);
   137		format[2] = (o_vtsmcu[2] + 3350 - oe);
   138		format[3] = (o_vtsmcu[3] + 3350 - oe);
   139		format[4] = (o_vtsmcu[4] + 3350 - oe);
   140		format[5] = (o_vtsabb + 3350 - oe);
   141	
   142		for (i = 0; i < 6; i++)
   143			x_roomt[i] = (((format[i] * 10000) / 4096) * 10000) / gain;
   144	
   145		temp0 = (10000 * 100000 / gain) * 15 / 18;
   146	
   147		if (!o_slope_sign)
   148			mts = (temp0 * 10) / (1534 + o_slope * 10);
   149		else
   150			mts = (temp0 * 10) / (1534 - o_slope * 10);
   151	
   152		for (idx = 0; idx < svsp->bank_max; idx++) {
   153			svsb = &svsp->banks[idx];
   154			svsb->mts = mts;
   155	
   156			switch (svsb->sw_id) {
   157			case SVSB_CPU_LITTLE:
   158				tb_roomt = x_roomt[3];
   159				break;
   160			case SVSB_CPU_BIG:
   161				tb_roomt = x_roomt[4];
   162				break;
   163			case SVSB_CCI:
   164				tb_roomt = x_roomt[3];
   165				break;
   166			case SVSB_GPU:
   167				tb_roomt = x_roomt[1];
   168				break;
   169			default:
   170				dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id);
   171				goto remove_mt8183_svsb_mon_mode;
   172			}
   173	
   174			temp0 = (degc_cali * 10 / 2);
   175			temp1 = ((10000 * 100000 / 4096 / gain) *
   176				 oe + tb_roomt * 10) * 15 / 18;
   177	
   178			if (!o_slope_sign)
   179				temp2 = temp1 * 100 / (1534 + o_slope * 10);
   180			else
   181				temp2 = temp1 * 100 / (1534 - o_slope * 10);
   182	
   183			svsb->bts = (temp0 + temp2 - 250) * 4 / 10;
   184		}
   185	
   186		return true;
   187	
   188	remove_mt8183_svsb_mon_mode:
   189		for (idx = 0; idx < svsp->bank_max; idx++) {
   190			svsb = &svsp->banks[idx];
   191			svsb->mode_support &= ~SVSB_MODE_MON;
   192		}
   193	
   194		return true;
   195	}
   196	
 > 197	int svs_mt8183_platform_probe(struct svs_platform *svsp)

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

View attachment "config" of type "text/plain" (279524 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ