lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 30 Sep 2022 13:33:50 +0200
From:   Nicolas Ferre <nicolas.ferre@...rochip.com>
To:     Horatiu Vultur <horatiu.vultur@...rochip.com>,
        <devicetree@...r.kernel.org>, <claudiu.beznea@...rochip.com>,
        <linux-kernel@...r.kernel.org>
CC:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <UNGLinuxDriver@...rochip.com>
Subject: Re: [PATCH] ARM: dts: lan966x: Add interrupt support for PHYs on
 pcb8290

On 15/09/2022 at 08:41, Horatiu Vultur wrote:
> Add interrupt support for the PHYs found on pcb8290. They are all
> sharing the same interrupt line towards lan966x.
> 
> Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>

Looks good to me:
Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>

> ---
>   arch/arm/boot/dts/lan966x-pcb8290.dts | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x-pcb8290.dts b/arch/arm/boot/dts/lan966x-pcb8290.dts
> index af92bb12bc6cd..2ed53da914acb 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8290.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8290.dts
> @@ -68,41 +68,57 @@ &mdio0 {
>   
>   	ext_phy0: ethernet-phy@7 {
>   		reg = <7>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy1: ethernet-phy@8 {
>   		reg = <8>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy2: ethernet-phy@9 {
>   		reg = <9>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy3: ethernet-phy@10 {
>   		reg = <10>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy4: ethernet-phy@15 {
>   		reg = <15>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy5: ethernet-phy@16 {
>   		reg = <16>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy6: ethernet-phy@17 {
>   		reg = <17>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   
>   	ext_phy7: ethernet-phy@18 {
>   		reg = <18>;
> +		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-parent = <&gpio>;
>   		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
>   	};
>   };


-- 
Nicolas Ferre

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ