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Message-ID: <20220930125105.GA93753-robh@kernel.org>
Date: Fri, 30 Sep 2022 07:51:05 -0500
From: Rob Herring <robh@...nel.org>
To: Hal Feng <hal.feng@...ux.starfivetech.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Linus Walleij <linus.walleij@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 20/30] dt-bindings: clock: Add
starfive,jh7110-clkgen-aon bindings
On Fri, Sep 30, 2022 at 01:56:32PM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@...il.dk>
>
> Add bindings for the always-on clock generator on the JH7110
> RISC-V SoC by StarFive Technology Ltd.
>
> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> Signed-off-by: Hal Feng <hal.feng@...ux.starfivetech.com>
> ---
> .../clock/starfive,jh7110-clkgen-aon.yaml | 62 +++++++++++++++++++
> 1 file changed, 62 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-aon.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-aon.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-aon.yaml
> new file mode 100644
> index 000000000000..029ff57b9e3e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-aon.yaml
> @@ -0,0 +1,62 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-clkgen-aon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 Always-On Clock Generator
> +
> +maintainers:
> + - Emil Renner Berthing <kernel@...il.dk>
> + - Xingyu Wu <xingyu.wu@...ux.starfivetech.com>
> +
> +properties:
> + compatible:
> + const: starfive,jh7110-clkgen-aon
> +
> + clocks:
> + items:
> + - description: Main Oscillator
> + - description: RTC clock
> + - description: RMII reference clock
> + - description: RGMII RX clock
> + - description: STG AXI/AHB clock
> + - description: APB Bus clock
> +
> + clock-names:
> + items:
> + - const: osc
> + - const: clk_rtc
> + - const: gmac0_rmii_refin
> + - const: gmac0_rgmii_rxin
> + - const: stg_axiahb
> + - const: apb_bus_func
> +
> + '#clock-cells':
> + const: 1
> + description:
> + See <dt-bindings/clock/starfive-jh7110-aon.h> for valid indices.
No 'reg'? How do you access this h/w then? If it is part of some block,
we need to see the full picture.
Rob
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