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Message-ID: <20221001030656.29365-12-quic_molvera@quicinc.com>
Date:   Fri, 30 Sep 2022 20:06:48 -0700
From:   Melody Olvera <quic_molvera@...cinc.com>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>
CC:     <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Melody Olvera <quic_molvera@...cinc.com>
Subject: [PATCH 11/19] arm64: dts: qcom: qdru1000: Add spmi node

Add the spmi bus for the QDU1000 and QRU1000 SoCs.

Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
---
 arch/arm64/boot/dts/qcom/qdru1000.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qdru1000.dtsi b/arch/arm64/boot/dts/qcom/qdru1000.dtsi
index c5acdc447074..62a6a6e8ca59 100644
--- a/arch/arm64/boot/dts/qcom/qdru1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdru1000.dtsi
@@ -252,6 +252,24 @@ tcsr_mutex: hwlock@...0000 {
 			#hwlock-cells = <1>;
 		};
 
+		spmi_bus: spmi@...0000 {
+			compatible = "qcom,spmi-pmic-arb";
+			reg = <0x0 0xc400000 0x0 0x3000>,
+			      <0x0 0xc500000 0x0 0x400000>,
+			      <0x0 0xc440000 0x0 0x80000>,
+			      <0x0 0xc4c0000 0x0 0x10000>,
+			      <0x0 0xc42d000 0x0 0x4000>;
+			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+			interrupt-names = "periph_irq";
+			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,ee = <0>;
+			qcom,channel = <0>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			interrupt-controller;
+			#interrupt-cells = <4>;
+		};
+
 		tlmm: pinctrl@...0000 {
 			compatible = "qcom,qdu1000-tlmm", "qcom,qru1000-tlmm";
 			reg = <0x0 0xf000000 0x0 0x1000000>;
-- 
2.37.3

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