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Message-ID: <37926f0f-e176-929e-939a-cd43a031e224@linaro.org>
Date: Sat, 1 Oct 2022 11:24:10 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Melody Olvera <quic_molvera@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/5] dt-bindings: clock: Add QDU1000 and QRU1000 GCC clock
bindings
On 01/10/2022 05:03, Melody Olvera wrote:
> Add device tree bindings for global clock controller on QDU1000 and
> QRU1000 SoCs.
>
> Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
> ---
> .../bindings/clock/qcom,gcc-qdru1000.yaml | 74 ++++++++
> include/dt-bindings/clock/qcom,gcc-qdru1000.h | 170 ++++++++++++++++++
> 2 files changed, 244 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml
> create mode 100644 include/dt-bindings/clock/qcom,gcc-qdru1000.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml
> new file mode 100644
> index 000000000000..d92f558d547c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,gcc-qdru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Global Clock & Reset Controller Binding for QDU1000 and QRU1000
Drop "Binding"
> +
> +maintainers:
> + - Melody Olvera <quic_molvera@...cinc.com>
> +
> +description: |
> + Qualcomm global clock control module which supports the clocks, resets and
> + power domains on QDU1000 and QRU1000
> +
> + See also:
> + - dt-bindings/clock/qcom,gcc-qdru1000.h
Full path
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,gcc-qdu1000
> + - qcom,gcc-qru1000
> +
> + clocks:
> + items:
> + - description: Board XO source
> + - description: Sleep clock source
> + - description: PCIE 0 Pipe clock source (Optional clock)
Skip "Optional clock"
> + - description: PCIE 0 Phy Auxiliary clock source (Optional clock)
> + - description: USB3 Phy wrapper pipe clock source (Optional clock)
> + minItems: 2
> +
> + clock-names:
> + items:
> + - const: bi_tcxo
> + - const: sleep_clk
> + - const: pcie_0_pipe_clk # Optional clock
Skip "Optional clock"
> + - const: pcie_0_phy_aux_clk # Optional clock
> + - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
> + minItems: 2
> +
> + '#clock-cells':
> + const: 1
> +
> + '#reset-cells':
> + const: 1
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - '#clock-cells'
> + - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,rpmh.h>
> + clock-controller@...000 {
> + compatible = "qcom,gcc-qdu1000";
> + reg = <0x00100000 0x001f4200>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
> + clock-names = "bi_tcxo", "sleep_clk";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +...
> diff --git a/include/dt-bindings/clock/qcom,gcc-qdru1000.h b/include/dt-bindings/clock/qcom,gcc-qdru1000.h
> new file mode 100644
> index 000000000000..cdc5d1a6a007
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,gcc-qdru1000.h
> @@ -0,0 +1,170 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
Dual license.
Best regards,
Krzysztof
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