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Message-ID: <b2d905b2-5664-442b-bc12-fd759ac9fa9f@gmail.com> Date: Mon, 3 Oct 2022 03:41:34 -0500 From: Russell Haley <yumpusamongus@...il.com> To: lukasz.luba@....com Cc: dietmar.eggemann@....com, linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org, rafael@...nel.org, vincent.guittot@...aro.org, viresh.kumar@...aro.org Subject: Re: [PATCH v2] cpufreq: schedutil: Move max CPU capacity to sugov_policy >We can do that since all CPUs in the same frequency domain have the >same max capacity Do they? In the Intel Alder Lake datasheet [1], it says that a single power rail supplies all IA ("Intel Architecture") cores, which includes both P cores and E cores. I don't have anything that new, but on Haswell and Skylake, despite the fact that each CPU has a separate policy that lists only itself in affected_cpus, with the userspace governor I find that every core runs at the the highest frequency set among all cores. For clarity: $ grep . cpufreq/policy*/scaling_{setspeed,cur_freq} cpufreq/policy0/scaling_setspeed:3000000 cpufreq/policy1/scaling_setspeed:2000000 cpufreq/policy0/scaling_cur_freq:2999997 cpufreq/policy1/scaling_cur_freq:3000001 It seems that these cores are in the same frequency domain, even if cpufreq doesn't know about it. I don't know if this affects the behavior of the governors in any way, but it might be a bug in intel_pstate that could one day be fixed. If it is, then any heterogeneous-uarch chips with both CPU types sharing a voltage rail would have CPUs with different max capacity in the same frequency domain. This might present a problem for any future attempt to harmonize treatment of big.LITTLE between ARM and x86. [1]: https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/12th-generation-intel-core-processors-datasheet-volume-1-of-2/processor-power-rails_1/
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