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Message-ID: <20221003171042.GA2457570-robh@kernel.org>
Date: Mon, 3 Oct 2022 12:10:42 -0500
From: Rob Herring <robh@...nel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
devicetree@...r.kernel.org, linux-gpio@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-kernel@...r.kernel.org, Andy Gross <agross@...nel.org>,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: pinctrl: qcom,sdm845: convert to
dtschema
On Sat, Oct 01, 2022 at 11:08:58AM +0200, Krzysztof Kozlowski wrote:
> On 01/10/2022 00:05, Rob Herring wrote:
> > On Fri, 30 Sep 2022 22:05:29 +0200, Krzysztof Kozlowski wrote:
> >> Convert Qualcomm SDM845 pin controller bindings to DT schema. Keep
> >> the parsing of pin configuration subnodes consistent with other Qualcomm
> >> schemas (children named with '-state' suffix, their children with
> >> '-pins').
> >>
> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> >> ---
> >> .../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 176 ------------------
> >> .../bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 158 ++++++++++++++++
> >> 2 files changed, 158 insertions(+), 176 deletions(-)
> >> delete mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> >> create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
> >>
> >
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> >
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> >
> > Full log is available here: https://patchwork.ozlabs.org/patch/
> >
> >
> > pinctrl@...0000: 'ap-edp-bklten', 'ap-suspend-l-hog', 'ap_suspend_l_assert', 'ap_suspend_l_deassert', 'bios-flash-wp-r-l', 'cci0-default', 'cci0-sleep', 'cci1-default', 'cci1-sleep', 'ec-ap-int-l', 'edp-brij-en', 'edp-brij-irq', 'en-pp3300-dx-edp', 'h1-ap-int-odl', 'pen-eject-odl', 'pen-irq-l', 'pen-pdct-l', 'pen-rst-l', 'qspi-clk', 'qspi-cs0', 'qspi-cs1', 'qspi-data01', 'qspi-data12', 'quat_mi2s_active', 'quat_mi2s_sd0_active', 'quat_mi2s_sd0_sleep', 'quat_mi2s_sd1_active', 'quat_mi2s_sd1_sleep', 'quat_mi2s_sd2_active', 'quat_mi2s_sd2_sleep', 'quat_mi2s_sd3_active', 'quat_mi2s_sd3_sleep', 'quat_mi2s_sleep', 'qup-i2c0-default', 'qup-i2c1-default', 'qup-i2c10-default', 'qup-i2c11-default', 'qup-i2c12-default', 'qup-i2c13-default', 'qup-i2c14-default', 'qup-i2c15-default', 'qup-i2c2-default', 'qup-i2c3-default', 'qup-i2c4-default', 'qup-i2c5-default', 'qup-i2c6-default', 'qup-i2c7-default', 'qup-i2c8-default', 'qup-i2c9-default', 'qup-spi0-default', 'qup-spi1-default', 'qup-spi10-default', 'qup-spi11-default', 'qup-spi12-default', 'qup-spi13-default', 'qup-spi14-default', 'qup-spi15-default', 'qup-spi2-default', 'qup-spi3-default', 'qup-spi4-default', 'qup-spi5-default', 'qup-spi6-default', 'qup-spi7-default', 'qup-spi8-default', 'qup-spi9-default', 'qup-uart0-default', 'qup-uart1-default', 'qup-uart10-default', 'qup-uart11-default', 'qup-uart12-default', 'qup-uart13-default', 'qup-uart14-default', 'qup-uart15-default', 'qup-uart2-default', 'qup-uart3-default', 'qup-uart4-default', 'qup-uart5-default', 'qup-uart6-default', 'qup-uart7-default', 'qup-uart8-default', 'qup-uart9-default', 'sd-cd-odl', 'sdc2-clk', 'sdc2-cmd', 'sdc2-data', 'ts-int-l', 'ts-reset-l' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
> > arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dtb
> > arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dtb
> > arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dtb
>
> This is fixed in patch #1 in this set, however for some reason DT
> patchwork did not get it (maybe size too big?).
PW is filtered to only bindings, binding headers, and drivers/of/.
Rob
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