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Message-ID: <20221003180949.GA2104321@bhelgaas>
Date:   Mon, 3 Oct 2022 13:09:49 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Jonathan Derrick <jonathan.derrick@...ux.dev>
Cc:     Pali Rohár <pali@...nel.org>,
        Lukas Wunner <lukas@...ner.de>,
        Vidya Sagar <vidyas@...dia.com>, bhelgaas@...gle.com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        lpieralisi@...nel.org, kw@...ux.com, thierry.reding@...il.com,
        jonathanh@...dia.com, mani@...nel.org,
        Sergey.Semin@...kalelectronics.ru, jszhang@...nel.org,
        linux-pci@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        kthota@...dia.com, mmaddireddy@...dia.com, sagar.tv@...il.com,
        Marek Behún <kabel@...nel.org>
Subject: Re: [PATCH V1 0/4] GPIO based PCIe Hot-Plug support

On Sat, Oct 01, 2022 at 05:50:07PM -0600, Jonathan Derrick wrote:
> On 10/1/2022 10:20 AM, Pali Rohár wrote:
> ...

> > Would not it better to rather synthesise PCIe Slot Capabilities support
> > in your PCIe Root Port device (e.g. via pci-bridge-emul.c) and then let
> > existing PCI hotplug code to take care for hotplugging? Because it
> > already implements all required stuff for re-scanning, registering and
> > unregistering PCIe devices for Root Ports with Slot Capabilities. And I
> > think that there is no need to have just another (GPIO based)
> > implementation of PCI hotplug.
>
> I did that a few years ago (rejected), but can attest to the robustness of
> the pcie hotplug code on non-hotplug slots.
> https://lwn.net/Articles/811988/

I think the thread is here:
https://lore.kernel.org/linux-pci/1581120007-5280-1-git-send-email-jonathan.derrick@intel.com/
and I'm sorry that my response came across as "rejected".  I intended
it as "this is good ideas and good work and we should keep going".

Bjorn

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