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Message-ID: <865ygz8b4c.wl-maz@kernel.org>
Date: Tue, 04 Oct 2022 23:41:55 +0100
From: Marc Zyngier <maz@...nel.org>
To: Fabio Estevam <festevam@...il.com>
Cc: Frank Li <Frank.Li@....com>, imx@...ts.linux.dev,
Thomas Gleixner <tglx@...utronix.de>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
NXP Linux Team <linux-imx@....com>,
"open list:IRQCHIP DRIVERS" <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>, colin.i.king@...il.com
Subject: Re: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp
On Tue, 04 Oct 2022 22:27:32 +0100,
Fabio Estevam <festevam@...il.com> wrote:
>
> Hi Frank,
>
> On Tue, Oct 4, 2022 at 5:24 PM Frank Li <Frank.Li@....com> wrote:
> >
> > Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
> >
> > Signed-off-by: Frank Li <Frank.Li@....com>
>
> You missed passing Reported-by and Fixes tag.
I fixed that locally. Thanks for CC'ing Colin though.
M.
--
Without deviation from the norm, progress is not possible.
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