| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 4 Oct 2022 13:10:19 +0500
From: Muhammad Usama Anjum <usama.anjum@...labora.com>
To: Shyam Sundar S K <Shyam-sundar.S-k@....com>,
Hans de Goede <hdegoede@...hat.com>,
Mark Gross <markgross@...nel.org>
Cc: Muhammad Usama Anjum <usama.anjum@...labora.com>,
kernel@...labora.com, kernel-janitors@...r.kernel.org,
platform-driver-x86@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH] platform/x86/amd/pmf: pass the struct by reference
The out structure should be passed by reference instead of passing by
value. This saves the extra copy of the structure.
Fixes: 1738061c9ec8 ("platform/x86/amd/pmf: Add support for CnQF")
Signed-off-by: Muhammad Usama Anjum <usama.anjum@...labora.com>
---
drivers/platform/x86/amd/pmf/cnqf.c | 92 ++++++++++++++---------------
1 file changed, 46 insertions(+), 46 deletions(-)
diff --git a/drivers/platform/x86/amd/pmf/cnqf.c b/drivers/platform/x86/amd/pmf/cnqf.c
index 668c7c0fea83..3f9731a2ac28 100644
--- a/drivers/platform/x86/amd/pmf/cnqf.c
+++ b/drivers/platform/x86/amd/pmf/cnqf.c
@@ -158,100 +158,100 @@ int amd_pmf_trans_cnqf(struct amd_pmf_dev *dev, int socket_power, ktime_t time_l
return 0;
}
-static void amd_pmf_update_trans_data(int idx, struct apmf_dyn_slider_output out)
+static void amd_pmf_update_trans_data(int idx, struct apmf_dyn_slider_output *out)
{
struct cnqf_tran_params *tp;
tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_QUIET];
- tp->time_constant = out.t_balanced_to_quiet;
+ tp->time_constant = out->t_balanced_to_quiet;
tp->target_mode = CNQF_MODE_QUIET;
tp->shifting_up = false;
tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_BALANCE_TO_PERFORMANCE];
- tp->time_constant = out.t_balanced_to_perf;
+ tp->time_constant = out->t_balanced_to_perf;
tp->target_mode = CNQF_MODE_PERFORMANCE;
tp->shifting_up = true;
tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_QUIET_TO_BALANCE];
- tp->time_constant = out.t_quiet_to_balanced;
+ tp->time_constant = out->t_quiet_to_balanced;
tp->target_mode = CNQF_MODE_BALANCE;
tp->shifting_up = true;
tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_PERFORMANCE_TO_BALANCE];
- tp->time_constant = out.t_perf_to_balanced;
+ tp->time_constant = out->t_perf_to_balanced;
tp->target_mode = CNQF_MODE_BALANCE;
tp->shifting_up = false;
tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_TURBO_TO_PERFORMANCE];
- tp->time_constant = out.t_turbo_to_perf;
+ tp->time_constant = out->t_turbo_to_perf;
tp->target_mode = CNQF_MODE_PERFORMANCE;
tp->shifting_up = false;
tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_TURBO];
- tp->time_constant = out.t_perf_to_turbo;
+ tp->time_constant = out->t_perf_to_turbo;
tp->target_mode = CNQF_MODE_TURBO;
tp->shifting_up = true;
}
-static void amd_pmf_update_mode_set(int idx, struct apmf_dyn_slider_output out)
+static void amd_pmf_update_mode_set(int idx, struct apmf_dyn_slider_output *out)
{
struct cnqf_mode_settings *ms;
/* Quiet Mode */
ms = &config_store.mode_set[idx][CNQF_MODE_QUIET];
- ms->power_floor = out.ps[APMF_CNQF_QUIET].pfloor;
- ms->power_control.fppt = out.ps[APMF_CNQF_QUIET].fppt;
- ms->power_control.sppt = out.ps[APMF_CNQF_QUIET].sppt;
- ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_QUIET].sppt_apu_only;
- ms->power_control.spl = out.ps[APMF_CNQF_QUIET].spl;
- ms->power_control.stt_min = out.ps[APMF_CNQF_QUIET].stt_min_limit;
+ ms->power_floor = out->ps[APMF_CNQF_QUIET].pfloor;
+ ms->power_control.fppt = out->ps[APMF_CNQF_QUIET].fppt;
+ ms->power_control.sppt = out->ps[APMF_CNQF_QUIET].sppt;
+ ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_QUIET].sppt_apu_only;
+ ms->power_control.spl = out->ps[APMF_CNQF_QUIET].spl;
+ ms->power_control.stt_min = out->ps[APMF_CNQF_QUIET].stt_min_limit;
ms->power_control.stt_skin_temp[STT_TEMP_APU] =
- out.ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_APU];
+ out->ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_APU];
ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
- out.ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_HS2];
- ms->fan_control.fan_id = out.ps[APMF_CNQF_QUIET].fan_id;
+ out->ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_HS2];
+ ms->fan_control.fan_id = out->ps[APMF_CNQF_QUIET].fan_id;
/* Balance Mode */
ms = &config_store.mode_set[idx][CNQF_MODE_BALANCE];
- ms->power_floor = out.ps[APMF_CNQF_BALANCE].pfloor;
- ms->power_control.fppt = out.ps[APMF_CNQF_BALANCE].fppt;
- ms->power_control.sppt = out.ps[APMF_CNQF_BALANCE].sppt;
- ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_BALANCE].sppt_apu_only;
- ms->power_control.spl = out.ps[APMF_CNQF_BALANCE].spl;
- ms->power_control.stt_min = out.ps[APMF_CNQF_BALANCE].stt_min_limit;
+ ms->power_floor = out->ps[APMF_CNQF_BALANCE].pfloor;
+ ms->power_control.fppt = out->ps[APMF_CNQF_BALANCE].fppt;
+ ms->power_control.sppt = out->ps[APMF_CNQF_BALANCE].sppt;
+ ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_BALANCE].sppt_apu_only;
+ ms->power_control.spl = out->ps[APMF_CNQF_BALANCE].spl;
+ ms->power_control.stt_min = out->ps[APMF_CNQF_BALANCE].stt_min_limit;
ms->power_control.stt_skin_temp[STT_TEMP_APU] =
- out.ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_APU];
+ out->ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_APU];
ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
- out.ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_HS2];
- ms->fan_control.fan_id = out.ps[APMF_CNQF_BALANCE].fan_id;
+ out->ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_HS2];
+ ms->fan_control.fan_id = out->ps[APMF_CNQF_BALANCE].fan_id;
/* Performance Mode */
ms = &config_store.mode_set[idx][CNQF_MODE_PERFORMANCE];
- ms->power_floor = out.ps[APMF_CNQF_PERFORMANCE].pfloor;
- ms->power_control.fppt = out.ps[APMF_CNQF_PERFORMANCE].fppt;
- ms->power_control.sppt = out.ps[APMF_CNQF_PERFORMANCE].sppt;
- ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;
- ms->power_control.spl = out.ps[APMF_CNQF_PERFORMANCE].spl;
- ms->power_control.stt_min = out.ps[APMF_CNQF_PERFORMANCE].stt_min_limit;
+ ms->power_floor = out->ps[APMF_CNQF_PERFORMANCE].pfloor;
+ ms->power_control.fppt = out->ps[APMF_CNQF_PERFORMANCE].fppt;
+ ms->power_control.sppt = out->ps[APMF_CNQF_PERFORMANCE].sppt;
+ ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;
+ ms->power_control.spl = out->ps[APMF_CNQF_PERFORMANCE].spl;
+ ms->power_control.stt_min = out->ps[APMF_CNQF_PERFORMANCE].stt_min_limit;
ms->power_control.stt_skin_temp[STT_TEMP_APU] =
- out.ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_APU];
+ out->ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_APU];
ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
- out.ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_HS2];
- ms->fan_control.fan_id = out.ps[APMF_CNQF_PERFORMANCE].fan_id;
+ out->ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_HS2];
+ ms->fan_control.fan_id = out->ps[APMF_CNQF_PERFORMANCE].fan_id;
/* Turbo Mode */
ms = &config_store.mode_set[idx][CNQF_MODE_TURBO];
- ms->power_floor = out.ps[APMF_CNQF_TURBO].pfloor;
- ms->power_control.fppt = out.ps[APMF_CNQF_TURBO].fppt;
- ms->power_control.sppt = out.ps[APMF_CNQF_TURBO].sppt;
- ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_TURBO].sppt_apu_only;
- ms->power_control.spl = out.ps[APMF_CNQF_TURBO].spl;
- ms->power_control.stt_min = out.ps[APMF_CNQF_TURBO].stt_min_limit;
+ ms->power_floor = out->ps[APMF_CNQF_TURBO].pfloor;
+ ms->power_control.fppt = out->ps[APMF_CNQF_TURBO].fppt;
+ ms->power_control.sppt = out->ps[APMF_CNQF_TURBO].sppt;
+ ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_TURBO].sppt_apu_only;
+ ms->power_control.spl = out->ps[APMF_CNQF_TURBO].spl;
+ ms->power_control.stt_min = out->ps[APMF_CNQF_TURBO].stt_min_limit;
ms->power_control.stt_skin_temp[STT_TEMP_APU] =
- out.ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_APU];
+ out->ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_APU];
ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
- out.ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_HS2];
- ms->fan_control.fan_id = out.ps[APMF_CNQF_TURBO].fan_id;
+ out->ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_HS2];
+ ms->fan_control.fan_id = out->ps[APMF_CNQF_TURBO].fan_id;
}
static int amd_pmf_check_flags(struct amd_pmf_dev *dev)
@@ -284,8 +284,8 @@ static int amd_pmf_load_defaults_cnqf(struct amd_pmf_dev *dev)
return ret;
}
- amd_pmf_update_mode_set(i, out);
- amd_pmf_update_trans_data(i, out);
+ amd_pmf_update_mode_set(i, &out);
+ amd_pmf_update_trans_data(i, &out);
amd_pmf_update_power_threshold(i);
for (j = 0; j < CNQF_MODE_MAX; j++) {
--
2.30.2
Powered by blists - more mailing lists