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Message-ID: <YzxJRcdnvm1rWROK@smile.fi.intel.com>
Date: Tue, 4 Oct 2022 17:55:01 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: matthew.gerlach@...ux.intel.com
Cc: hao.wu@...el.com, yilun.xu@...el.com, russell.h.weight@...el.com,
basheer.ahmed.muddebihal@...el.com, trix@...hat.com,
mdf@...nel.org, linux-fpga@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
tianfei.zhang@...el.com, corbet@....net,
gregkh@...uxfoundation.org, linux-serial@...r.kernel.org,
jirislaby@...nel.org, geert+renesas@...der.be,
niklas.soderlund+renesas@...natech.se, macro@...am.me.uk,
johan@...nel.org, lukas@...ner.de,
Basheer Ahmed Muddebihal
<basheer.ahmed.muddebihal@...ux.intel.com>
Subject: Re: [PATCH v3 2/4] fpga: dfl: Add DFHv1 Register Definitions
On Tue, Oct 04, 2022 at 07:37:16AM -0700, matthew.gerlach@...ux.intel.com wrote:
> From: Basheer Ahmed Muddebihal <basheer.ahmed.muddebihal@...ux.intel.com>
>
> This patch adds the definitions for DFHv1 header and related register
> bitfields.
...
> - * Copyright (C) 2017-2018 Intel Corporation, Inc.
> + * Copyright (C) 2017-2022 Intel Corporation, Inc.
I do not think this is correct.
What happened to the code in 2019, 2020, and 2021? It's unclear. Have you
consulted with our lawyer about this?
That said, I _think_ (not your lawyer though) that the correct one should be
* Copyright (C) 2017-2018,2022 Intel Corporation, Inc.
If you wanted to correct that, perhaps it should be done in a separate patch
first with explanation for those years in the gap. Unfortunately I haven't
found any description for those.
Ditto for the rest similar cases.
--
With Best Regards,
Andy Shevchenko
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