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Message-ID: <20221005080104.175769-1-chin-ting_kuo@aspeedtech.com>
Date: Wed, 5 Oct 2022 16:01:04 +0800
From: Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>
To: <clg@...d.org>, <chin-ting_kuo@...eedtech.com>,
<broonie@...nel.org>, <joel@....id.au>, <andrew@...id.au>,
<linux-aspeed@...ts.ozlabs.org>, <openbmc@...ts.ozlabs.org>,
<linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<BMC-SW@...eedtech.com>, <steven_lee@...eedtech.com>
Subject: [PATCH] spi: aspeed: Fix typo in mode_bits field for AST2600 platform
Both quad SPI TX and RX modes can be supported on AST2600.
Correct typo in mode_bits field in both ast2600_fmc_data
ast2600_spi_data structs.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>
---
drivers/spi/spi-aspeed-smc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index a334e89add86..33cefcf18392 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -1163,7 +1163,7 @@ static const struct aspeed_spi_data ast2500_spi_data = {
static const struct aspeed_spi_data ast2600_fmc_data = {
.max_cs = 3,
.hastype = false,
- .mode_bits = SPI_RX_QUAD | SPI_RX_QUAD,
+ .mode_bits = SPI_RX_QUAD | SPI_TX_QUAD,
.we0 = 16,
.ctl0 = CE0_CTRL_REG,
.timing = CE0_TIMING_COMPENSATION_REG,
@@ -1178,7 +1178,7 @@ static const struct aspeed_spi_data ast2600_fmc_data = {
static const struct aspeed_spi_data ast2600_spi_data = {
.max_cs = 2,
.hastype = false,
- .mode_bits = SPI_RX_QUAD | SPI_RX_QUAD,
+ .mode_bits = SPI_RX_QUAD | SPI_TX_QUAD,
.we0 = 16,
.ctl0 = CE0_CTRL_REG,
.timing = CE0_TIMING_COMPENSATION_REG,
--
2.25.1
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