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Date:   Wed, 5 Oct 2022 09:17:09 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <conor@...nel.org>, <prabhakar.csengg@...il.com>
CC:     <geert+renesas@...der.be>, <paul.walmsley@...ive.com>,
        <palmer@...belt.com>, <aou@...s.berkeley.edu>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <magnus.damm@...il.com>, <heiko@...ech.de>, <guoren@...nel.org>,
        <philipp.tomsich@...ll.eu>, <nathan@...nel.org>,
        <atishp@...osinc.com>, <apatel@...tanamicro.com>,
        <linux-renesas-soc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <biju.das.jz@...renesas.com>,
        <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [RFC PATCH v2 2/2] soc: renesas: Add L2 cache management for
 RZ/Five SoC

On 05/10/2022 09:58, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 5 October 2022 09:44:56 IST, "Lad, Prabhakar" <prabhakar.csengg@...il.com> wrote:
>> Hi Conor,
>>
>> Thank you for the review.
>>
>> On Tue, Oct 4, 2022 at 6:43 PM Conor Dooley <conor@...nel.org> wrote:
> 
>>>> +static void cpu_dcache_wb_range(unsigned long start,
>>>> +                             unsigned long end,
>>>> +                             int line_size)
>>>> +{
>>>> +     bool ucctl_ok = false;
>>>> +     unsigned long pa;
>>>> +     int mhartid = 0;
>>>> +#ifdef CONFIG_SMP
>>>> +     mhartid = smp_processor_id();
>>>> +#endif
>>>
>>> Won't this produce complaints from your if you compile with CONFIG_SMP
>>> set?
>>>
>> No I dont see a build issue with SMP enabled, do you see any reason
>> why it should fail?
> 
> Not fail but complain about the unused variable.
> 

Not unused variable, sorry but the unused 0 that it was initialised with*

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