linux-kernel - Re: [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX configuration for VPPSYS

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Wed, 5 Oct 2022 09:53:34 +0800
From:   moudy ho <moudy.ho@...iatek.com>
To:     Allen-KH Cheng (程冠勳) 
        <Allen-KH.Cheng@...iatek.com>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "Roy-CW Yeh (葉中瑋)" 
        <Roy-CW.Yeh@...iatek.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX
 configuration for VPPSYS

On Tue, 2022-10-04 at 19:46 +0800, Allen-KH Cheng (程冠勳) wrote:
> Hi Moudy,
> 
> On Tue, 2022-10-04 at 17:33 +0800, Moudy Ho wrote:
> > From: "Roy-CW.Yeh" <roy-cw.yeh@...iatek.com>
> > 
> > Compatible names of VPPSYS0 and VPPSYS1 should be renamed to
> > "mediatek,mt8195-mmsys" to match the description of the binding
> > file.
> > Also, add two nodes for MT8195 VPPSYS0/1 MUTEX.
> > 
> > Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@...iatek.com>
> > ---
> >  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22
> > ++++++++++++++++++++--
> >  1 file changed, 20 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > index 905d1a90b406..7f54fa7d0185 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > @@ -1477,11 +1477,20 @@
> >  		};
> >  
> >  		vppsys0: clock-controller@...00000 {
> > -			compatible = "mediatek,mt8195-vppsys0";
> > +			compatible = "mediatek,mt8195-mmsys";
> >  			reg = <0 0x14000000 0 0x1000>;
> > +			mediatek,gce-client-reg = <&gce1
> > SUBSYS_1400XXXX 0 0x1000>;
> >  			#clock-cells = <1>;
> >  		};
> >  
> 
> I run "ARCH=arm64 make dtbs check" and some of the tests failed.
> 
> The node name should be 'syscon' from mediatek/mediatek,mmsys.yaml.
> 
> 
> > +		vpp0-mutex@...0f000 {
> > +			compatible = "mediatek,mt8195-vpp-mutex";
> > +			reg = <0 0x1400f000 0 0x1000>;
> > +			mediatek,gce-client-reg = <&gce1
> > SUBSYS_1400XXXX 0xf000 0x1000>;
> > +			clocks = <&vppsys0 CLK_VPP0_MUTEX>;
> > +			power-domains = <&spm
> > MT8195_POWER_DOMAIN_VPPSYS0>;
> > +		};
> > +
> 
> 'interrupts' is a required property from mediatek/mediatek,mutex.yaml
> 
> 
> >  		smi_sub_common_vpp0_vpp1_2x1: smi@...10000 {
> >  			compatible = "mediatek,mt8195-smi-sub-common";
> >  			reg = <0 0x14010000 0 0x1000>;
> > @@ -1582,11 +1591,20 @@
> >  		};
> >  
> >  		vppsys1: clock-controller@...00000 {
> > -			compatible = "mediatek,mt8195-vppsys1";
> > +			compatible = "mediatek,mt8195-mmsys";
> >  			reg = <0 0x14f00000 0 0x1000>;
> > +			mediatek,gce-client-reg = <&gce1
> > SUBSYS_14f0XXXX 0 0x1000>;
> 
> Node name: syscon.
> 
> >  			#clock-cells = <1>;
> >  		};
> >  
> > +		vpp1-mutex@...01000 {
> > +			compatible = "mediatek,mt8195-vpp-mutex";
> > +			reg = <0 0x14f01000 0 0x1000>;
> > +			mediatek,gce-client-reg = <&gce1
> > SUBSYS_14f0XXXX 0x1000 0x1000>;
> > +			clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>;
> > +			power-domains = <&spm
> > MT8195_POWER_DOMAIN_VPPSYS1>;
> > +		};
> > +
> 
> 'interrupts' is a required property
> 
> Thanks,
> Allen
> 

Hi Allen,

Apologies for the failed test, I'll check again by adding dtsb_check
instead of just dt_binding_check .

Thanks & Regards,
Moudy

> >  		larb5: larb@...02000 {
> >  			compatible = "mediatek,mt8195-smi-larb";
> >  			reg = <0 0x14f02000 0 0x1000>;
> 
> 
>