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Message-ID: <20221005182935.7xdp5axnags5obu6@SoMainline.org>
Date: Wed, 5 Oct 2022 20:29:35 +0200
From: Marijn Suijten <marijn.suijten@...ainline.org>
To: Abhinav Kumar <quic_abhinavk@...cinc.com>
Cc: phone-devel@...r.kernel.org, Rob Clark <robdclark@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
~postmarketos/upstreaming@...ts.sr.ht,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Martin Botka <martin.botka@...ainline.org>,
Jami Kettunen <jami.kettunen@...ainline.org>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>, Sean Paul <sean@...rly.run>,
Thomas Zimmermann <tzimmermann@...e.de>,
Javier Martinez Canillas <javierm@...hat.com>,
Alex Deucher <alexander.deucher@....com>,
Douglas Anderson <dianders@...omium.org>,
Vladimir Lypak <vladimir.lypak@...il.com>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
Lyude Paul <lyude@...hat.com>
Subject: Re: [PATCH 5/5] drm/dsc: Prevent negative BPG offsets from shadowing
adjacent bitfields
On 2022-10-05 08:33:23, Abhinav Kumar wrote:
[..]
> hmm .... downstream seems to have the & just before the reg write
>
> https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/DISPLAY.LA.2.0.r1-08000-WAIPIO.0/msm/sde/sde_hw_dsc_1_2.c#L310
https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/DISPLAY.LA.2.0.r1-08000-WAIPIO.0/msm/sde/sde_hw_dsc.c#L156
The reference code for NON-v1.2 doesn't do this here, but you already
confirmed by the docs - and I confirmed by testing a set of size #1 -
that the register is fine with having only 6 bits.
> But yes, we can move this to the dsi calculation to match what others
> are doing. I am fine with that.
Thanks, done that in v2.
> > [..]
>
> Even I wasnt. When I was reviewing this series, it seemed like a valid
> change so I checked the latest downstream code like i always do to see
> whether and how this is handled and found that these issues were
> addressed there so thought i would update that here.
Thanks for confirming that it was done in the correct/same way :)
> > [..]
> Its not really parallel development OR competing drivers.
> The design of these features downstream (not just DSC but many others)
> is quite different because some of the downstream designs wont get
> accepted upstream as its tightly coupled with our
> compositor/device-tree. Thats where we are slowly trying to implement
> these in an upstream compatible way.
But this is what it feels like.
To me this sounds like downstream is more of a staging / prototyping
area that is actively used in production, while the driver
implementation is fleshed out and slowly brought to mainline in a
careful and controlled manner.
That's not a bad thing, but it does mean that mainline always lags
behind in terms of features and hardware support. At least I'm glad
to hear that downstream is slowly using more DRM primitives, and the
driver is becoming more digestible as well.
> BTW, that being said. Its not always the case that every issue seen
> upstream has already been fixed downstream. In fact, on some occasions
> we found something fixed in upstream in a better way and ported them
> downstream too.
I wasn't expecting anything else, as different drivers have inevitably
different details and different bugs. The issues this series fixes
weren't applicable to the downstream kernel because it (at the time)
wasn't even using this drm_dsc_config struct with different semantics.
Regardless, it's good to hear that fixes are transplanted in both ways
even if it does mean extra overhead maintaining and keeping tabs on two
drivers at once.
- Marijn
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