lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Yz6cjzrmu8HNPhhy@hirez.programming.kicks-ass.net>
Date:   Thu, 6 Oct 2022 11:14:55 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Cc:     Juri Lelli <juri.lelli@...hat.com>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        Ricardo Neri <ricardo.neri@...el.com>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Ben Segall <bsegall@...gle.com>,
        Daniel Bristot de Oliveira <bristot@...hat.com>,
        Dietmar Eggemann <dietmar.eggemann@....com>,
        Len Brown <len.brown@...el.com>, Mel Gorman <mgorman@...e.de>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
        Steven Rostedt <rostedt@...dmis.org>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Valentin Schneider <vschneid@...hat.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org, "Tim C . Chen" <tim.c.chen@...el.com>
Subject: Re: [RFC PATCH 15/23] thermal: intel: hfi: Report per-cpu
 class-specific performance scores

On Thu, Oct 06, 2022 at 10:52:16AM +0200, Peter Zijlstra wrote:
> On Wed, Oct 05, 2022 at 04:59:59PM -0700, Ricardo Neri wrote:
> > On Tue, Sep 27, 2022 at 01:59:15PM +0200, Peter Zijlstra wrote:
> > > On Fri, Sep 09, 2022 at 04:11:57PM -0700, Ricardo Neri wrote:
> > > > Support the arch_get_task_class_score() interface of the scheduler. Use the
> > > > data that Intel Thread Director provides to inform the scheduler the
> > > > performance of a class of tasks when placed on a given CPU.
> > > > 
> > > 
> > > > +static void get_one_hfi_cap(struct hfi_instance *hfi_instance, s16 index,
> > > > +			    struct hfi_cpu_data *hfi_caps, int class)
> > > > +{
> > > > +	struct hfi_cpu_data *caps;
> > > > +
> > > > +	/* Find the capabilities of @cpu */
> > > > +	caps = hfi_instance->data + index * hfi_features.cpu_stride +
> > > > +	       class * hfi_features.class_stride;
> > > > +	memcpy(hfi_caps, caps, sizeof(*hfi_caps));
> > > > +}
> > > > +
> > > > +int intel_hfi_get_task_class_score(int class, int cpu)
> > > > +{
> > > > +	struct hfi_cpu_info *info = &per_cpu(hfi_cpu_info, cpu);
> > > > +	struct hfi_instance *instance;
> > > > +	struct hfi_cpu_data caps;
> > > > +	unsigned long flags;
> > > > +	int cap;
> > > > +
> > > > +	if (cpu < 0 || cpu >= nr_cpu_ids)
> > > > +		return -EINVAL;
> > > > +
> > > > +	if (class == TASK_CLASS_UNCLASSIFIED)
> > > > +		return -EINVAL;
> > > > +
> > > > +	if (class >= (int)hfi_features.nr_classes)
> > > > +		return -EINVAL;
> > > > +
> > > > +	instance = info->hfi_instance;
> > > > +	if (!instance)
> > > > +		return -ENOENT;
> > > > +
> > > > +	raw_spin_lock_irqsave(&instance->table_lock, flags);
> > > > +	get_one_hfi_cap(instance, info->index, &caps, class);
> > > > +	cap = caps.perf_cap;
> > > > +	raw_spin_unlock_irqrestore(&instance->table_lock, flags);
> > > > +
> > > > +	return cap;
> > > > +}
> > > 
> > > Does any of that data actually ever change? Isn't the class score fixed
> > > per CPU type?
> > 
> > Yes, data can change. The Intel SDM Vol 3 Section 14.6.7 states that the
> > table can be updated during runtime.
> 
> I find the SDM is often unreadable gibberish, this part doesn't dissapoint.
> 
> There's a ton of might and maybe there; what does it actually do and how
> often does it do it? Given the thermal interrupt is such a shitshow, we
> really, as in *REALLY* don't want this to happen at any frequency at
> all.
> 
> And if it barely happens, why do we care if it happens at all?

I enabled this HFI crud on my ADL (INTEL_HFI_THERMAL -- because
apparently Debian doesn't default enable this) and now I get all of _1_
interrupt during boot.

Building a kernel on that machine doesn't manage to trip another one.

TRM:          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1          1   Thermal event interrupts

So yeah.. *can* change, but doesn't.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ