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Message-ID: <3430472e-0da3-4e92-7e40-b5b9731db98e@collabora.com>
Date: Thu, 6 Oct 2022 11:15:51 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Yassine Oudjana <yassine.oudjana@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Sean Wang <sean.wang@...nel.org>,
Andy Teng <andy.teng@...iatek.com>
Cc: Yassine Oudjana <y.oudjana@...tonmail.com>,
linux-mediatek@...ts.infradead.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 10/10] pinctrl: mediatek: Add MT6735 pinctrl driver
Il 05/10/22 19:43, Yassine Oudjana ha scritto:
> From: Yassine Oudjana <y.oudjana@...tonmail.com>
>
> Add a driver for the MediaTek MT6735 SoC pin controller. This driver
> also supports the pin controller on MT6735M, which lacks 6 physical
> pins (198-203) used for MSDC2 on MT6735.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@...tonmail.com>
> ---
> MAINTAINERS | 8 +
> drivers/pinctrl/mediatek/Kconfig | 6 +
> drivers/pinctrl/mediatek/Makefile | 1 +
> drivers/pinctrl/mediatek/pinctrl-mt6735.c | 584 +++
> drivers/pinctrl/mediatek/pinctrl-mtk-mt6735.h | 3993 +++++++++++++++++
> 5 files changed, 4592 insertions(+)
> create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt6735.c
> create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt6735.h
>
..snip..
> diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6735.c b/drivers/pinctrl/mediatek/pinctrl-mt6735.c
> new file mode 100644
> index 000000000000..dd9dad9cb142
> --- /dev/null
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt6735.c
> @@ -0,0 +1,584 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2022 Yassine Oudjana <y.oudjana@...tonmail.com>
> + */
> +
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#include "pinctrl-mtk-mt6735.h"
> +#include "pinctrl-paris.h"
> +
..snip..
> +
> +/* Pin group registers */
> +#define GPIO_IES 0x000
> +#define GPIO_SMT 0x010
> +#define GPIO_TDSEL0 0x020
> +#define GPIO_TDSEL1 0x024
This is the only reason why I can't give you a Reviewed-by, and I'm sad about that.
Please fix that tabulation after #define.
> +#define GPIO_RDSEL0 0x028
> +#define GPIO_RDSEL1 0x02c
> +#define GPIO_PULLEN0 0x030
> +#define GPIO_PULLEN1 0x040
> +#define GPIO_PULLSEL0 0x050
> +#define GPIO_PULLSEL1 0x060
> +#define GPIO_DRV0 0x070
> +#define GPIO_DRV1 0x074
...and same here.
> +#define GPIO_PUPD0 0x080
> +#define GPIO_PUPD1 0x090
> +
Thanks,
Angelo
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