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Message-ID: <DU0PR04MB9417E587ED9439309510B34A885C9@DU0PR04MB9417.eurprd04.prod.outlook.com>
Date: Thu, 6 Oct 2022 10:44:29 +0000
From: Peng Fan <peng.fan@....com>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>,
"jassisinghbrar@...il.com" <jassisinghbrar@...il.com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Ying Liu <victor.liu@....com>
Subject: RE: [PATCH V2] mailbox: imx: fix RST channel support
Hi Jassi,
> Subject: [PATCH V2] mailbox: imx: fix RST channel support
Would you pick this patch?
Thanks,
Peng.
>
> From: Peng Fan <peng.fan@....com>
>
> Because IMX_MU_xCR_MAX was increased to 5, some mu cfgs were not
> updated to include the CR register. Add the missed CR register to xcr array.
>
> Fixes: 82ab513baed5 ("mailbox: imx: support RST channel")
> Reported-by: Liu Ying <victor.liu@....com>
> Signed-off-by: Peng Fan <peng.fan@....com>
> Tested-by: Liu Ying <victor.liu@....com> # i.MX8qm/qxp MEK boards boot
> ---
>
> V2:
> Correct Fixes commit hash
>
> drivers/mailbox/imx-mailbox.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
> index 02922073c9ef..20f2ec880ad6 100644
> --- a/drivers/mailbox/imx-mailbox.c
> +++ b/drivers/mailbox/imx-mailbox.c
> @@ -904,7 +904,7 @@ static const struct imx_mu_dcfg
> imx_mu_cfg_imx7ulp = {
> .xTR = 0x20,
> .xRR = 0x40,
> .xSR = {0x60, 0x60, 0x60, 0x60},
> - .xCR = {0x64, 0x64, 0x64, 0x64},
> + .xCR = {0x64, 0x64, 0x64, 0x64, 0x64},
> };
>
> static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = { @@ -927,7 +927,7
> @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp_s4 = {
> .xTR = 0x200,
> .xRR = 0x280,
> .xSR = {0xC, 0x118, 0x124, 0x12C},
> - .xCR = {0x110, 0x114, 0x120, 0x128},
> + .xCR = {0x8, 0x110, 0x114, 0x120, 0x128},
> };
>
> static const struct imx_mu_dcfg imx_mu_cfg_imx93_s4 = { @@ -938,7
> +938,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx93_s4 = {
> .xTR = 0x200,
> .xRR = 0x280,
> .xSR = {0xC, 0x118, 0x124, 0x12C},
> - .xCR = {0x110, 0x114, 0x120, 0x128},
> + .xCR = {0x8, 0x110, 0x114, 0x120, 0x128},
> };
>
> static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = { @@ -949,7
> +949,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = {
> .xTR = 0x0,
> .xRR = 0x10,
> .xSR = {0x20, 0x20, 0x20, 0x20},
> - .xCR = {0x24, 0x24, 0x24, 0x24},
> + .xCR = {0x24, 0x24, 0x24, 0x24, 0x24},
> };
>
> static const struct imx_mu_dcfg imx_mu_cfg_imx8_seco = { @@ -960,7
> +960,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8_seco = {
> .xTR = 0x0,
> .xRR = 0x10,
> .xSR = {0x20, 0x20, 0x20, 0x20},
> - .xCR = {0x24, 0x24, 0x24, 0x24},
> + .xCR = {0x24, 0x24, 0x24, 0x24, 0x24},
> };
>
> static const struct of_device_id imx_mu_dt_ids[] = {
> --
> 2.37.1
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