lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20221006154041.13001-7-xin3.li@intel.com>
Date:   Thu,  6 Oct 2022 08:40:41 -0700
From:   Xin Li <xin3.li@...el.com>
To:     linux-kernel@...r.kernel.org, x86@...nel.org
Cc:     tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        dave.hansen@...ux.intel.com, hpa@...or.com
Subject: [PATCH 6/6] x86/gsseg: use the LKGS instruction if available for load_gs_index()

From: "H. Peter Anvin (Intel)" <hpa@...or.com>

The LKGS instruction atomically loads a segment descriptor into the
%gs descriptor registers, *except* that %gs.base is unchanged, and the
base is instead loaded into MSR_IA32_KERNEL_GS_BASE, which is exactly
what we want this function to do.

Signed-off-by: H. Peter Anvin (Intel) <hpa@...or.com>
Signed-off-by: Xin Li <xin3.li@...el.com>
---
 arch/x86/include/asm/gsseg.h | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/gsseg.h b/arch/x86/include/asm/gsseg.h
index 5e3b56a17098..b8a6a98d88b8 100644
--- a/arch/x86/include/asm/gsseg.h
+++ b/arch/x86/include/asm/gsseg.h
@@ -3,15 +3,41 @@
 #define _ASM_X86_GSSEG_H
 
 #include <linux/types.h>
+
+#include <asm/asm.h>
+#include <asm/cpufeature.h>
+#include <asm/alternative.h>
 #include <asm/processor.h>
+#include <asm/nops.h>
 
 #ifdef CONFIG_X86_64
 
 extern asmlinkage void asm_load_gs_index(u16 selector);
 
+#define LKGS_DI	_ASM_BYTES(0xf2,0x0f,0x00,0xf7)
+
 static inline void native_load_gs_index(unsigned int selector)
 {
-	asm_load_gs_index(selector);
+	u16 sel = selector;
+
+	/*
+	 * Note: the fixup is used for the LKGS instruction, but
+	 * it needs to be attached to the primary instruction sequence
+	 * as it isn't something that gets patched.
+	 *
+	 * %rax is provided to the assembly routine as a scratch
+	 * register.
+	 */
+	alternative_io("1: call asm_load_gs_index\n"
+		       ".pushsection \".fixup\",\"ax\"\n"
+		       "2:	xorl %k[sel], %k[sel]\n"
+		       "	jmp 1b\n"
+		       ".popsection\n"
+		       _ASM_EXTABLE(1b, 2b),
+		       _ASM_BYTES(0x3e) LKGS_DI,
+		       X86_FEATURE_LKGS,
+		       ASM_OUTPUT2([sel] "+D" (sel), ASM_CALL_CONSTRAINT),
+		       ASM_NO_INPUT_CLOBBER(_ASM_AX));
 }
 
 #endif /* CONFIG_X86_64 */
-- 
2.34.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ