[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20221009064431.18839-2-lvjianmin@loongson.cn>
Date: Sun, 9 Oct 2022 14:44:28 +0800
From: Jianmin Lv <lvjianmin@...ngson.cn>
To: Thomas Gleixner <tglx@...utronix.de>, Marc Zyngier <maz@...nel.org>
Cc: linux-kernel@...r.kernel.org, loongarch@...ts.linux.dev,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Huacai Chen <chenhuacai@...ngson.cn>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Len Brown <lenb@...nel.org>, rafael@...nel.org,
linux-pci@...r.kernel.org, linux-acpi@...r.kernel.org
Subject: [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity
On LoongArch ACPI based systems, the irq trigger type of PCI devices
is high level, so high level triggered type is required to pass
to acpi_register_gsi when create irq mapping for PCI devices.
Signed-off-by: Jianmin Lv <lvjianmin@...ngson.cn>
---
drivers/acpi/pci_irq.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index 08e15774fb9f..ff30ceca2203 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
u8 pin;
int triggering = ACPI_LEVEL_SENSITIVE;
/*
- * On ARM systems with the GIC interrupt model, level interrupts
+ * On ARM systems with the GIC interrupt model, or LoongArch
+ * systems with the LPIC interrupt model, level interrupts
* are always polarity high by specification; PCI legacy
* IRQs lines are inverted before reaching the interrupt
* controller and must therefore be considered active high
* as default.
*/
- int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
+ int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
+ acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
char *link = NULL;
char link_desc[16];
--
2.31.1
Powered by blists - more mailing lists