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Message-ID: <CAKNVLfaNJjdVCeVCrOOw5xjsJ=gzJ2uFxAjgMA9tWHE=qFEECA@mail.gmail.com>
Date:   Tue, 11 Oct 2022 21:38:03 +0300
From:   Siarhei Volkau <lis8215@...il.com>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Vinod Koul <vkoul@...nel.org>,
        Paul Cercueil <paul@...pouillou.net>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Jiri Slaby <jirislaby@...nel.org>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        dmaengine@...r.kernel.org, linux-serial@...r.kernel.org,
        linux-mips@...r.kernel.org, linux-gpio@...r.kernel.org
Subject: Re: [PATCH 7/8] serial: 8250/ingenic: Add support for the
 JZ4750/JZ4755 SoCs

пн, 10 окт. 2022 г. в 23:20, Greg Kroah-Hartman <gregkh@...uxfoundation.org>:
> What does "clkdiv" mean here?

That means a clock divisor between the input oscillator and UART
peripheral clock source. Most Ingenic SoCs don't have that divisor,
so 1 is always in effect for them.
However, the JZ4750 and JZ4755 have switchable /2 clock divisor.

> If you only have 1 or 2 as an option

Yes, it is.

> just have 2 functions instead please.

Got it, will do that.

Thank you.

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