[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <SJ1PR11MB6083203F6D6EFF8E562A2593FC239@SJ1PR11MB6083.namprd11.prod.outlook.com>
Date: Tue, 11 Oct 2022 17:09:19 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: Borislav Petkov <bp@...en8.de>,
Daniel Verkamp <dverkamp@...omium.org>
CC: "x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] x86: also disable FSRM if ERMS is disabled
>> The Intel SDM says: "Software can disable fast-string operation by
>> clearing the fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR",
>> so it's not an invalid configuration for this bit to be unset.
>
> Dunno, did Intel folks think about clearing the respective CPUID bits
> when exposing IA32_MISC_ENABLE[0] to software? Tony?
I don't know if it was thought about. Experimentally clearing bit
0 of IA32_MISC_ENABLE does not affect the CPUID bit settings
for either ERMS or FSRM (on the one system I tried that supports
both of these bits).
-Tony
Powered by blists - more mailing lists