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Message-Id: <20221012055602.1544944-7-uwu@icenowy.me>
Date: Wed, 12 Oct 2022 13:55:58 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andre Przywara <andre.przywara@....com>
Cc: soc@...nel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-phy@...ts.infradead.org,
linux-usb@...r.kernel.org, Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH v2 06/10] ARM: suniv: add USB-related device nodes
The suniv SoC has a USB OTG controller and a USB PHY like other
Allwinner SoCs.
Add their device tree node.
Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
---
No changes since v1.
arch/arm/boot/dts/suniv-f1c100s.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 0edc1724407b..a01541ba42c5 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -133,6 +133,32 @@ mmc1: mmc@...0000 {
#size-cells = <0>;
};
+ usb_otg: usb@...3000 {
+ compatible = "allwinner,suniv-f1c100s-musb";
+ reg = <0x01c13000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = <26>;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ allwinner,sram = <&otg_sram 1>;
+ status = "disabled";
+ };
+
+ usbphy: phy@...3400 {
+ compatible = "allwinner,suniv-f1c100s-usb-phy";
+ reg = <0x01c13400 0x10>;
+ reg-names = "phy_ctrl";
+ clocks = <&ccu CLK_USB_PHY0>;
+ clock-names = "usb0_phy";
+ resets = <&ccu RST_USB_PHY0>;
+ reset-names = "usb0_reset";
+ #phy-cells = <1>;
+ status = "disabled";
+ };
+
ccu: clock@...0000 {
compatible = "allwinner,suniv-f1c100s-ccu";
reg = <0x01c20000 0x400>;
--
2.37.1
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