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Date:   Fri, 14 Oct 2022 06:54:50 +0800
From:   kernel test robot <lkp@...el.com>
To:     Palmer Dabbelt <palmer@...osinc.com>
Cc:     llvm@...ts.linux.dev, kbuild-all@...ts.01.org,
        Ammar Faizi <ammarfaizi2@...weeb.org>,
        GNU/Weeb Mailing List <gwml@...r.gnuweeb.org>,
        linux-kernel@...r.kernel.org
Subject: [ammarfaizi2-block:palmer/linux/riscv-hwprobe-v1 4/5]
 arch/riscv/kernel/sys_riscv.c:229:8: warning: variable 'ret' is used
 uninitialized whenever switch case is taken

tree:   https://github.com/ammarfaizi2/linux-block palmer/linux/riscv-hwprobe-v1
head:   ea6ba33fae4f9ca9d13f457ea2ccc8dd9f99d367
commit: 510c491cb9d87dcbdc91c63558dc704968723240 [4/5] RISC-V: hwprobe: Support probing of misaligned accesss performance
config: riscv-randconfig-r003-20221012
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 791a7ae1ba3efd6bca96338e10ffde557ba83920)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv64-linux-gnu
        # https://github.com/ammarfaizi2/linux-block/commit/510c491cb9d87dcbdc91c63558dc704968723240
        git remote add ammarfaizi2-block https://github.com/ammarfaizi2/linux-block
        git fetch --no-tags ammarfaizi2-block palmer/linux/riscv-hwprobe-v1
        git checkout 510c491cb9d87dcbdc91c63558dc704968723240
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/kernel/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

   In file included from arch/riscv/kernel/sys_riscv.c:8:
   In file included from include/linux/syscalls.h:88:
   In file included from include/trace/syscall.h:7:
   In file included from include/linux/trace_events.h:9:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/riscv/include/asm/io.h:136:
   include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           val = __raw_readb(PCI_IOBASE + addr);
                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
                                                           ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:37:51: note: expanded from macro '__le16_to_cpu'
   #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
                                                     ^
   In file included from arch/riscv/kernel/sys_riscv.c:8:
   In file included from include/linux/syscalls.h:88:
   In file included from include/trace/syscall.h:7:
   In file included from include/linux/trace_events.h:9:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/riscv/include/asm/io.h:136:
   include/asm-generic/io.h:573:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
                                                           ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:35:51: note: expanded from macro '__le32_to_cpu'
   #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
                                                     ^
   In file included from arch/riscv/kernel/sys_riscv.c:8:
   In file included from include/linux/syscalls.h:88:
   In file included from include/trace/syscall.h:7:
   In file included from include/linux/trace_events.h:9:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/riscv/include/asm/io.h:136:
   include/asm-generic/io.h:584:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           __raw_writeb(value, PCI_IOBASE + addr);
                               ~~~~~~~~~~ ^
   include/asm-generic/io.h:594:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
                                                         ~~~~~~~~~~ ^
   include/asm-generic/io.h:604:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
                                                         ~~~~~~~~~~ ^
   include/asm-generic/io.h:1134:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
                                                     ~~~~~~~~~~ ^
>> arch/riscv/kernel/sys_riscv.c:229:8: warning: variable 'ret' is used uninitialized whenever switch case is taken [-Wsometimes-uninitialized]
                   case RISCV_HWPROBE_KEY_CPUPERF_0:
                        ^~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/riscv/include/uapi/asm/hwprobe.h:27:37: note: expanded from macro 'RISCV_HWPROBE_KEY_CPUPERF_0'
   #define RISCV_HWPROBE_KEY_CPUPERF_0     5
                                           ^
   arch/riscv/kernel/sys_riscv.c:234:7: note: uninitialized use occurs here
                   if (ret < 0)
                       ^~~
   arch/riscv/kernel/sys_riscv.c:197:11: note: initialize the variable 'ret' to silence this warning
                   long ret;
                           ^
                            = 0
   8 warnings generated.


vim +/ret +229 arch/riscv/kernel/sys_riscv.c

   159	
   160	static
   161	long do_riscv_hwprobe(struct riscv_hwprobe __user *pairs, long pair_count,
   162			      long key_offset, long cpu_count,
   163			      unsigned long __user *cpus_user, unsigned long flags)
   164	{
   165		size_t out, k;
   166		long ret;
   167		struct cpumask cpus;
   168	
   169		/* Check the reserved flags. */
   170		if (flags != 0)
   171			return -EINVAL;
   172	
   173		/*
   174		 * The only supported values must be the same on all CPUs, but check to
   175		 * make sure userspace at least tried to provide something here for
   176		 * future compatibility.
   177		 */
   178		cpumask_clear(&cpus);
   179		if (cpu_count > cpumask_size())
   180			cpu_count = cpumask_size();
   181		ret = copy_from_user(&cpus, cpus_user, cpu_count);
   182		if (!ret)
   183			return -EFAULT;
   184	
   185	
   186		/*
   187		 * Userspace must provide at least one online CPU, without that there's
   188		 * no way to define what is supported.
   189		 */
   190		cpumask_and(&cpus, &cpus, cpu_online_mask);
   191		if (cpumask_empty(&cpus))
   192			return -EINVAL;
   193	
   194		out = 0;
   195		k = key_offset;
   196		while (out < pair_count && k < RISCV_HWPROBE_MAX_KEY) {
   197			long ret;
   198	
   199			switch (k) {
   200			case RISCV_HWPROBE_KEY_MVENDORID:
   201			case RISCV_HWPROBE_KEY_MARCHID:
   202			case RISCV_HWPROBE_KEY_MIMPID:
   203				ret = hwprobe_mid(pairs + out, k, &cpus);
   204				break;
   205	
   206			/*
   207			 * The kernel already assumes that the base single-letter ISA
   208			 * extensions are supported on all harts, and only supports the
   209			 * IMA base, so just cheat a bit here and tell that to
   210			 * userspace.
   211			 */
   212			case RISCV_HWPROBE_KEY_BASE_BEHAVIOR:
   213				ret = set_hwprobe(pairs + out, k,
   214						  RISCV_HWPROBE_BASE_BEHAVIOR_IMA);
   215				break;
   216	
   217			case RISCV_HWPROBE_KEY_IMA_EXT_0:
   218				{
   219					u64 val = 0;
   220	
   221					if (has_fpu())
   222						val |= RISCV_HWPROBE_IMA_FD;
   223					if (elf_hwcap & RISCV_ISA_EXT_c)
   224						val |= RISCV_HWPROBE_IMA_C;
   225					ret = set_hwprobe(pairs + out, k, val);
   226				}
   227				break;
   228	
 > 229			case RISCV_HWPROBE_KEY_CPUPERF_0:
   230				set_hwprobe(pairs + out, k, hwprobe_misaligned(&cpus));
   231				break;
   232			}
   233	
   234			if (ret < 0)
   235				return ret;
   236			if (ret == 0)
   237				out++;
   238		}
   239	
   240		return out;
   241	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

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