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Message-ID: <DU2PR04MB8677C5FEE1F93CF2B9B12D3B8C259@DU2PR04MB8677.eurprd04.prod.outlook.com>
Date: Thu, 13 Oct 2022 00:45:43 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: "tharvey@...eworks.com" <tharvey@...eworks.com>
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Subject: RE: [PATCH v12 0/4] Add the iMX8MP PCIe support
> -----Original Message-----
> From: Tim Harvey <tharvey@...eworks.com>
> Sent: 2022年10月13日 2:31
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: vkoul@...nel.org; a.fatoum@...gutronix.de; p.zabel@...gutronix.de;
> l.stach@...gutronix.de; bhelgaas@...gle.com; lorenzo.pieralisi@....com;
> robh@...nel.org; shawnguo@...nel.org; alexander.stein@...tq-group.com;
> marex@...x.de; richard.leitner@...ux.dev; linux-phy@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> kernel@...gutronix.de; dl-linux-imx <linux-imx@....com>
> Subject: Re: [PATCH v12 0/4] Add the iMX8MP PCIe support
>
> On Mon, Oct 10, 2022 at 1:07 AM Richard Zhu <hongxing.zhu@....com>
> wrote:
> >
> > Based on the 6.0-rc1 of the pci/next branch.
> > This series adds the i.MX8MP PCIe support and tested on i.MX8MP EVK
> > board when one PCIe NVME device is used.
> >
>
> Richard,
>
> This no longer applies to pci/next (pci-v6.1-changes) and needs to be rebased.
> It does apply on top of 6.0-rc1 but then the patches to pci-imx6.c and
> imx8mp.dtsi are missing so I'm not sure where to try to base this off of.
>
> Do you have a repo for testing and have you been able to test a Gen3 link with
> A1 silicon yet?
>
Hi Tim:
Thanks for your concerns.
Yes, I used one NVME device to test the Gen3 link on i.MX8MP(A1) EVK board.
Okay, I would resend this version after rebase to pci-v6.1-changes.
Best Regards
Richard Zhu
> Best Regards,
>
> Tim
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