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Message-ID: <CAMuHMdXSxaaajm1SpcgrZo_sk0Ne-Tbx4hTSshNXQUoUCfdYxA@mail.gmail.com>
Date:   Thu, 13 Oct 2022 10:24:18 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Wolfram Sang <wsa+renesas@...g-engineering.com>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Sergei Shtylyov <sergei.shtylyov@...il.com>,
        linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Hai Pham <hai.pham.ud@...esas.com>
Subject: Re: [PATCH] dt-bindings: memory: renesas,rpc-if: Document R-Car V4H support

Hi Wolfram,

On Thu, Oct 13, 2022 at 10:00 AM Wolfram Sang
<wsa+renesas@...g-engineering.com> wrote:
> > I actually wrote such a patch a while back.
> > However, I didn't send it after discovering the R-Car V3U Series
> > User’s Manual Rev. 0.50 does not mention the fourth Strobe Timing
> > Adjustment bit (STRTIM) in the RPC-IF PHY Control Register (PHYCNT),
> > which is present on R-Car S4-8 and V4H, but not on R-Car Gen3.
>
> I see. Thanks for the heads up! Maybe this is worth a comment because it
> is an exception to the usual behaviour?

You mean an exception to the exception to the usual behaviour that
R-Car <foo>3 is part of the R-Car Gen3 family, making it the normal
rule? ;-)

We're actually not 100% sure the bit is present or not.  Rev. 0.50 is
still an early revision of the R-Car V3U documentation, so it might lack
some updates.  I tried changing all bits of the PHYCNT register, but
unfortunately all bits except for bit 31 stick on all SoCs I tried, so
we can't use this method to determine which bits exist and which don't.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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