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Message-ID: <b074f586-2e51-4060-203f-e91f20cb57e8@collabora.com>
Date: Thu, 13 Oct 2022 14:00:05 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Johnson Wang <johnson.wang@...iatek.com>, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, sboyd@...nel.org
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com,
kuan-hsin.lee@...iatek.com, yu-chang.wang@...iatek.com,
Edward-JW Yang <edward-jw.yang@...iatek.com>
Subject: Re: [PATCH v4 1/4] clk: mediatek: Export PLL operations symbols
Il 13/10/22 13:23, Johnson Wang ha scritto:
> Export PLL operations and register functions for different type
> of clock driver used.
>
> Co-developed-by: Edward-JW Yang <edward-jw.yang@...iatek.com>
> Signed-off-by: Edward-JW Yang <edward-jw.yang@...iatek.com>
> Signed-off-by: Johnson Wang <johnson.wang@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
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