lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y0gUH1fbB/LijKLw@sirena.org.uk>
Date:   Thu, 13 Oct 2022 14:35:27 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Tharun Kumar P <tharunkumar.pasumarthi@...rochip.com>
Cc:     linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
        UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH v2 SPI for-next 2/2] spi: microchip: pci1xxxx: Add
 suspend and resume support for PCI1XXXX SPI driver

On Thu, Oct 06, 2022 at 10:35:14AM +0530, Tharun Kumar P wrote:

> +static int pci1xxxx_spi_resume(struct device *dev)
> +{
> +	struct pci1xxxx_spi *spi_ptr = dev_get_drvdata(dev);
> +	struct pci1xxxx_spi_internal *spi_sub_ptr;
> +	u32 regval = SPI_RESUME_CONFIG;
> +	u8 iter;
> +
> +	for (iter = 0; iter < spi_ptr->total_hw_instances; iter++) {
> +		spi_sub_ptr = spi_ptr->spi_int[iter];
> +		spi_master_resume(spi_sub_ptr->spi_host);
> +		writel(regval, spi_ptr->reg_base +
> +		       SPI_MST_EVENT_MASK_REG_OFFSET(iter));
> +
> +		/* Restore config at resume */
> +		store_restore_config(spi_ptr, spi_sub_ptr, iter, 0);
> +	}
> +
> +	return 0;
> +}

There should be a call to spi_controller_suspend() in here (and
similarly in resume) to tell the controller to stop the queue of
operations.

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ