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Message-ID: <BYAPR12MB4773374B74AF0162A930003A9E249@BYAPR12MB4773.namprd12.prod.outlook.com>
Date:   Fri, 14 Oct 2022 04:30:06 +0000
From:   "Katakam, Harini" <harini.katakam@....com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "harinikatakamlinux@...il.com" <harinikatakamlinux@...il.com>,
        "Simek, Michal" <michal.simek@....com>,
        "Pandey, Radhey Shyam" <radhey.shyam.pandey@....com>
Subject: RE: [PATCH] net: phy: dp83867: Extend RX strap quirk for SGMII mode

Hi Andrew,

> -----Original Message-----
> From: Andrew Lunn <andrew@...n.ch>
> Sent: Thursday, October 13, 2022 6:55 PM
> To: Katakam, Harini <harini.katakam@....com>
> Cc: hkallweit1@...il.com; linux@...linux.org.uk; davem@...emloft.net;
> edumazet@...gle.com; kuba@...nel.org; pabeni@...hat.com;
> netdev@...r.kernel.org; linux-kernel@...r.kernel.org;
> harinikatakamlinux@...il.com; Simek, Michal <michal.simek@....com>;
> Pandey, Radhey Shyam <radhey.shyam.pandey@....com>
> Subject: Re: [PATCH] net: phy: dp83867: Extend RX strap quirk for SGMII
> mode
> 
> On Thu, Oct 13, 2022 at 12:58:33PM +0530, Harini Katakam wrote:
> > When RX strap in HW is not set to MODE 3 or 4, bit 7 and 8 in CF4
> > register should be set. The former is already handled in
> > dp83867_config_init; add the latter in SGMII specific initialization.
> >
> > Signed-off-by: Harini Katakam <harini.katakam@....com>
> > ---
> >  drivers/net/phy/dp83867.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> > index 6939563d3b7c..a2aac9032af6 100644
> > --- a/drivers/net/phy/dp83867.c
> > +++ b/drivers/net/phy/dp83867.c
> > @@ -853,6 +853,13 @@ static int dp83867_config_init(struct phy_device
> *phydev)
> >  		else
> >  			val &= ~DP83867_SGMII_TYPE;
> >  		phy_write_mmd(phydev, DP83867_DEVADDR,
> DP83867_SGMIICTL, val);
> > +		/* This is a SW workaround for link instability if RX_CTRL is
> > +		 * not strapped to mode 3 or 4 in HW. This is required for
> SGMII
> > +		 * in addition to clearing bit 7, handled above.
> > +		 */
> 
> Blank line before a comment please.
> 
> Should this have a fixes tag? Are there deployed boards which are broken
> because of this? Or do you have a new board, using SGMII, which is not
> deployed yet?

Thanks for the review. I will add a fixes tag on the original patch that added
SGMII support. I dint consider it first because this is workaround for a HW
strap issue. Yes, we have boards that are deployed.

Regards,
Harini

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