linux-kernel - RE: [PATCH v3 1/4] arm64: dts: fix drive strength macros as per FSD HW UM

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Message-ID: <000001d8df6d$9e0337f0$da09a7d0$@samsung.com>
Date:   Fri, 14 Oct 2022 07:08:07 +0530
From:   "Alim Akhtar" <alim.akhtar@...sung.com>
To:     "'Padmanabhan Rajanbabu'" <p.rajanbabu@...sung.com>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <chanho61.park@...sung.com>, <linus.walleij@...aro.org>,
        <pankaj.dubey@...sung.com>
Cc:     <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-samsung-soc@...r.kernel.org>
Subject: RE: [PATCH v3 1/4] arm64: dts: fix drive strength macros as per FSD
 HW UM



>-----Original Message-----
>From: Padmanabhan Rajanbabu [mailto:p.rajanbabu@...sung.com]
>Sent: Thursday, October 13, 2022 4:10 PM
>To: robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org;
>alim.akhtar@...sung.com; chanho61.park@...sung.com;
>linus.walleij@...aro.org; pankaj.dubey@...sung.com
>Cc: devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-
>samsung-soc@...r.kernel.org; Padmanabhan Rajanbabu
><p.rajanbabu@...sung.com>
>Subject: [PATCH v3 1/4] arm64: dts: fix drive strength macros as per FSD HW
>UM
>
>Drive strength macros defined for FSD platform is not reflecting actual names
>and values as per HW UM. FSD SoC pinctrl has following four levels of drive-
>strength and their corresponding values:
>Level-1 <-> 0
>Level-2 <-> 1
>Level-4 <-> 2
>Level-6 <-> 3
>
>The commit 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") used
>drive strength macros defined for Exynos4 SoC family. For some IPs the
>macros values of Exynos4 matched and worked well, but Exynos4 SoC family
>drive-strength (names and values) is not exactly matching with FSD SoC.
>
>Fix the drive strength macros to reflect actual names and values given in FSD
>HW UM.
>
>Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
>Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@...sung.com>
>---

Reviewed-by: Alim Akhtar <alim.akhtar@...sung.com>

Thanks!

> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 8 ++++----
> arch/arm64/boot/dts/tesla/fsd-pinctrl.h    | 6 +++---
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>index d0abb9aa0e9e..4e151d419909 100644
>--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>@@ -55,14 +55,14 @@
> 		samsung,pins = "gpf5-0";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_NONE>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	ufs_refclk_out: ufs-refclk-out-pins {
> 		samsung,pins = "gpf5-1";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_NONE>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
> };
>
>@@ -239,14 +239,14 @@
> 		samsung,pins = "gpb6-1";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	pwm1_out: pwm1-out-pins {
> 		samsung,pins = "gpb6-5";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c0_bus: hs-i2c0-bus-pins {
>diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>index 6ffbda362493..c397d02208a0 100644
>--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>@@ -16,9 +16,9 @@
> #define FSD_PIN_PULL_UP			3
>
> #define FSD_PIN_DRV_LV1			0
>-#define FSD_PIN_DRV_LV2			2
>-#define FSD_PIN_DRV_LV3			1
>-#define FSD_PIN_DRV_LV4			3
>+#define FSD_PIN_DRV_LV2			1
>+#define FSD_PIN_DRV_LV4			2
>+#define FSD_PIN_DRV_LV6			3
>
> #define FSD_PIN_FUNC_INPUT		0
> #define FSD_PIN_FUNC_OUTPUT		1
>--
>2.17.1