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Message-ID: <20221014141509.211149-7-fabrice.gasnier@foss.st.com>
Date: Fri, 14 Oct 2022 16:15:05 +0200
From: Fabrice Gasnier <fabrice.gasnier@...s.st.com>
To: <alexandre.torgue@...s.st.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>
CC: <amelie.delaunay@...s.st.com>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<fabrice.gasnier@...s.st.com>
Subject: [PATCH v2 06/10] ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
From: Amelie Delaunay <amelie.delaunay@...s.st.com>
USBPHYC manages the two USB High-Speed phys. port0 is used by USBH and
port1 is used by USBOTG.
Enable and tune both PHYs on stm32mp135f-dk.
Signed-off-by: Amelie Delaunay <amelie.delaunay@...s.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...s.st.com>
---
arch/arm/boot/dts/stm32mp135f-dk.dts | 32 ++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index 291f05a958fd..af87fb36eabc 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -144,3 +144,35 @@ &uart4 {
pinctrl-0 = <&uart4_pins_a>;
status = "okay";
};
+
+&usbphyc {
+ status = "okay";
+};
+
+&usbphyc_port0 {
+ phy-supply = <&vdd_usb>;
+ st,current-boost-microamp = <1000>;
+ st,decrease-hs-slew-rate;
+ st,tune-hs-dc-level = <2>;
+ st,enable-hs-rftime-reduction;
+ st,trim-hs-current = <11>;
+ st,trim-hs-impedance = <2>;
+ st,tune-squelch-level = <1>;
+ st,enable-hs-rx-gain-eq;
+ st,no-hs-ftime-ctrl;
+ st,no-lsfs-sc;
+};
+
+&usbphyc_port1 {
+ phy-supply = <&vdd_usb>;
+ st,current-boost-microamp = <1000>;
+ st,decrease-hs-slew-rate;
+ st,tune-hs-dc-level = <2>;
+ st,enable-hs-rftime-reduction;
+ st,trim-hs-current = <11>;
+ st,trim-hs-impedance = <2>;
+ st,tune-squelch-level = <1>;
+ st,enable-hs-rx-gain-eq;
+ st,no-hs-ftime-ctrl;
+ st,no-lsfs-sc;
+};
--
2.25.1
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