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Message-Id: <20221016170035.35014-16-krzysztof.kozlowski@linaro.org>
Date: Sun, 16 Oct 2022 13:00:16 -0400
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephan Gerhold <stephan@...hold.net>,
Shawn Guo <shawn.guo@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
krishna Lanka <quic_vamslank@...cinc.com>,
Sivaprakash Murugesan <sivaprak@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v5 15/34] dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Reviewed-by: Bjorn Andersson <andersson@...nel.org>
Reviewed-by: Rob Herring <robh@...nel.org>
---
Changes since v4:
1. Drop drive-strength (included by common TLMM node).
Changes since v3:
1. Drop properties and required items which are already provided by
common TLMM schema.
---
.../pinctrl/qcom,msm8226-pinctrl.yaml | 40 ++++---------------
1 file changed, 7 insertions(+), 33 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index ecb90c77f666..8e634d07eb67 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -21,26 +21,12 @@ properties:
description: Specifies the base address and size of the TLMM register space
maxItems: 1
- interrupts:
- description: Specifies the TLMM summary IRQ
- maxItems: 1
-
+ interrupts: true
interrupt-controller: true
-
- '#interrupt-cells':
- description: Specifies the PIN numbers and Flags, as defined in
- include/dt-bindings/interrupt-controller/irq.h
- const: 2
-
+ "#interrupt-cells": true
gpio-controller: true
-
- '#gpio-cells':
- description: Specifying the pin number and flags, as defined in
- include/dt-bindings/gpio/gpio.h
- const: 2
-
- gpio-ranges:
- maxItems: 1
+ "#gpio-cells": true
+ gpio-ranges: true
gpio-reserved-ranges:
maxItems: 1
@@ -60,7 +46,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
@@ -83,17 +69,12 @@ $defs:
blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
bias-pull-up: true
bias-disable: true
+ drive-strength: true
output-high: true
@@ -101,22 +82,15 @@ $defs:
required:
- pins
- - function
additionalProperties: false
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
- reg
- - interrupts
- - interrupt-controller
- - '#interrupt-cells'
- - gpio-controller
- - '#gpio-cells'
- - gpio-ranges
additionalProperties: false
--
2.34.1
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