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Message-Id: <20221016170035.35014-33-krzysztof.kozlowski@linaro.org>
Date: Sun, 16 Oct 2022 13:00:33 -0400
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephan Gerhold <stephan@...hold.net>,
Shawn Guo <shawn.guo@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
krishna Lanka <quic_vamslank@...cinc.com>,
Sivaprakash Murugesan <sivaprak@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v5 32/34] dt-bindings: pinctrl: qcom,sdx65: use common TLMM schema
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Reviewed-by: Bjorn Andersson <andersson@...nel.org>
Reviewed-by: Rob Herring <robh@...nel.org>
---
Changes since v4:
1. Drop drive-strength (included by common TLMM node).
Changes since v3:
1. Drop properties and required items which are already provided by
common TLMM schema.
---
.../bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 42 ++++---------------
1 file changed, 8 insertions(+), 34 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
index 0f796f1f0104..523c072df05f 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
@@ -20,25 +20,12 @@ properties:
reg:
maxItems: 1
- interrupts:
- maxItems: 1
-
+ interrupts: true
interrupt-controller: true
-
- '#interrupt-cells':
- description: Specifies the PIN numbers and Flags, as defined in
- include/dt-bindings/interrupt-controller/irq.h
- const: 2
-
+ "#interrupt-cells": true
gpio-controller: true
-
- '#gpio-cells':
- description: Specifying the pin number and flags, as defined in
- include/dt-bindings/gpio/gpio.h
- const: 2
-
- gpio-ranges:
- maxItems: 1
+ "#gpio-cells": true
+ gpio-ranges: true
gpio-reserved-ranges:
maxItems: 1
@@ -124,37 +111,24 @@ patternProperties:
qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3,
gpio ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
-
bias-pull-up: true
-
bias-disable: true
-
+ drive-strength: true
output-high: true
-
output-low: true
required:
- pins
- - function
additionalProperties: false
+allOf:
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
+
required:
- compatible
- reg
- - interrupts
- - interrupt-controller
- - '#interrupt-cells'
- - gpio-controller
- - '#gpio-cells'
- - gpio-ranges
additionalProperties: false
--
2.34.1
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