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Message-ID: <20221016171901.1483542-1-yaliang.wang@windriver.com>
Date:   Mon, 17 Oct 2022 01:19:00 +0800
From:   <yaliang.wang@...driver.com>
To:     <tudor.ambarus@...rochip.com>, <pratyush@...nel.org>,
        <michael@...le.cc>, <miquel.raynal@...tlin.com>, <richard@....at>,
        <vigneshr@...com>, <andy.yan@...k-chips.com>,
        <cyrille.pitchen@...ev4u.fr>
CC:     <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH v2 0/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt

GD25Q256 'C' generation 'GD25Q256C' implements the JESD216 standards,
JESD216 doesn't define the QER field in BFPT, but the 'GD25Q256C'
does define QE bit in status register 1 bit 6, so we need to tweak
quad_enable to properly set the function.

'D' and 'E' generations implement the JESD216B standards, so parsing
the SFDP to set quad_enable function is enough for them.

As the default_init is deprecated, so the post_bfpt hook will be the
right place to do this tweak.

Changes since v1 [1]
 - Just tweak the quad_enable function when needed.

Yaliang Wang (1):
  mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt

 drivers/mtd/spi-nor/gigadevice.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

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